Cascadable Dual-Buck Multilevel Inverter Modules with Autonomous DC Capacitor Voltage Balance

Zi Xiang Dai; Woei Luen Chen; Chia Ting Lin; Ming Sheng Xu; Kun Feng Chen

doi:10.1109/APEC39645.2020.9124155

Cascadable Dual-Buck Multilevel Inverter Modules with Autonomous DC Capacitor Voltage Balance

Zi Xiang Dai
, Woei Luen Chen
, Chia Ting Lin
, Ming Sheng Xu
, Kun Feng Chen

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

Traditional full-bridge inverter architecture is simple and can be easily connected to the grid. However, the bridge architecture has problems such as shoot-through current, severe voltage slew rate, and large filter volume. In order to improve the above shortcomings, this paper proposes a dual-buck multilevel inverter module, which adopts a power transistor and a diode to form a switching arm to prevent the shoot-through current problem. The use of the multilevel scheme can reduce the step size of the PWM voltage and is beneficial to lessen the voltage slew rate and downsize the filter volume. In addition, to simplify the system complexity, this paper proposes an autonomous input capacitor and clamping capacitor balance control, so that the microprocessors between the modules do not need to communicate with each other. The experimental results verify the feasibility and effectiveness of the proposed cascadable dual-buck multilevel inverter module for high-voltage applications.

Original language	English
Title of host publication	APEC 2020 - 35th Annual IEEE Applied Power Electronics Conference and Exposition
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	2446-2450
Number of pages	5
ISBN (Electronic)	9781728148298
DOIs	https://doi.org/10.1109/APEC39645.2020.9124155
State	Published - 03 2020
Externally published	Yes
Event	35th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2020 - New Orleans, United States Duration: 15 03 2020 → 19 03 2020

Publication series

Name	Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
Volume	2020-March

Conference

Conference	35th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2020
Country/Territory	United States
City	New Orleans
Period	15/03/20 → 19/03/20

Bibliographical note

Publisher Copyright:
© 2020 IEEE.

Keywords

charge equalizer
multilevel inverter
proportional-resonant controllers
shoot-through current

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

Access to Document

10.1109/APEC39645.2020.9124155

Cite this

Dai, Z. X., Chen, W. L., Lin, C. T., Xu, M. S., & Chen, K. F. (2020). Cascadable Dual-Buck Multilevel Inverter Modules with Autonomous DC Capacitor Voltage Balance. In APEC 2020 - 35th Annual IEEE Applied Power Electronics Conference and Exposition (pp. 2446-2450). Article 9124155 (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC; Vol. 2020-March). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APEC39645.2020.9124155

Dai, Zi Xiang ; Chen, Woei Luen ; Lin, Chia Ting et al. / Cascadable Dual-Buck Multilevel Inverter Modules with Autonomous DC Capacitor Voltage Balance. APEC 2020 - 35th Annual IEEE Applied Power Electronics Conference and Exposition. Institute of Electrical and Electronics Engineers Inc., 2020. pp. 2446-2450 (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC).

@inproceedings{1d7ba4a5b1fe4029a7111bc1e9832288,

title = "Cascadable Dual-Buck Multilevel Inverter Modules with Autonomous DC Capacitor Voltage Balance",

abstract = "Traditional full-bridge inverter architecture is simple and can be easily connected to the grid. However, the bridge architecture has problems such as shoot-through current, severe voltage slew rate, and large filter volume. In order to improve the above shortcomings, this paper proposes a dual-buck multilevel inverter module, which adopts a power transistor and a diode to form a switching arm to prevent the shoot-through current problem. The use of the multilevel scheme can reduce the step size of the PWM voltage and is beneficial to lessen the voltage slew rate and downsize the filter volume. In addition, to simplify the system complexity, this paper proposes an autonomous input capacitor and clamping capacitor balance control, so that the microprocessors between the modules do not need to communicate with each other. The experimental results verify the feasibility and effectiveness of the proposed cascadable dual-buck multilevel inverter module for high-voltage applications.",

keywords = "charge equalizer, multilevel inverter, proportional-resonant controllers, shoot-through current",

author = "Dai, \{Zi Xiang\} and Chen, \{Woei Luen\} and Lin, \{Chia Ting\} and Xu, \{Ming Sheng\} and Chen, \{Kun Feng\}",

note = "Publisher Copyright: {\textcopyright} 2020 IEEE.; 35th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2020 ; Conference date: 15-03-2020 Through 19-03-2020",

year = "2020",

month = mar,

doi = "10.1109/APEC39645.2020.9124155",

language = "英语",

series = "Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC",

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Dai, ZX, Chen, WL, Lin, CT, Xu, MS & Chen, KF 2020, Cascadable Dual-Buck Multilevel Inverter Modules with Autonomous DC Capacitor Voltage Balance. in APEC 2020 - 35th Annual IEEE Applied Power Electronics Conference and Exposition., 9124155, Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC, vol. 2020-March, Institute of Electrical and Electronics Engineers Inc., pp. 2446-2450, 35th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2020, New Orleans, United States, 15/03/20. https://doi.org/10.1109/APEC39645.2020.9124155

Cascadable Dual-Buck Multilevel Inverter Modules with Autonomous DC Capacitor Voltage Balance. / Dai, Zi Xiang; Chen, Woei Luen; Lin, Chia Ting et al.
APEC 2020 - 35th Annual IEEE Applied Power Electronics Conference and Exposition. Institute of Electrical and Electronics Engineers Inc., 2020. p. 2446-2450 9124155 (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC; Vol. 2020-March).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Cascadable Dual-Buck Multilevel Inverter Modules with Autonomous DC Capacitor Voltage Balance

AU - Dai, Zi Xiang

AU - Chen, Woei Luen

AU - Lin, Chia Ting

AU - Xu, Ming Sheng

AU - Chen, Kun Feng

PY - 2020/3

Y1 - 2020/3

N2 - Traditional full-bridge inverter architecture is simple and can be easily connected to the grid. However, the bridge architecture has problems such as shoot-through current, severe voltage slew rate, and large filter volume. In order to improve the above shortcomings, this paper proposes a dual-buck multilevel inverter module, which adopts a power transistor and a diode to form a switching arm to prevent the shoot-through current problem. The use of the multilevel scheme can reduce the step size of the PWM voltage and is beneficial to lessen the voltage slew rate and downsize the filter volume. In addition, to simplify the system complexity, this paper proposes an autonomous input capacitor and clamping capacitor balance control, so that the microprocessors between the modules do not need to communicate with each other. The experimental results verify the feasibility and effectiveness of the proposed cascadable dual-buck multilevel inverter module for high-voltage applications.

AB - Traditional full-bridge inverter architecture is simple and can be easily connected to the grid. However, the bridge architecture has problems such as shoot-through current, severe voltage slew rate, and large filter volume. In order to improve the above shortcomings, this paper proposes a dual-buck multilevel inverter module, which adopts a power transistor and a diode to form a switching arm to prevent the shoot-through current problem. The use of the multilevel scheme can reduce the step size of the PWM voltage and is beneficial to lessen the voltage slew rate and downsize the filter volume. In addition, to simplify the system complexity, this paper proposes an autonomous input capacitor and clamping capacitor balance control, so that the microprocessors between the modules do not need to communicate with each other. The experimental results verify the feasibility and effectiveness of the proposed cascadable dual-buck multilevel inverter module for high-voltage applications.

KW - charge equalizer

KW - multilevel inverter

KW - proportional-resonant controllers

KW - shoot-through current

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U2 - 10.1109/APEC39645.2020.9124155

DO - 10.1109/APEC39645.2020.9124155

M3 - 会议稿件

AN - SCOPUS:85087786925

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SP - 2446

EP - 2450

BT - APEC 2020 - 35th Annual IEEE Applied Power Electronics Conference and Exposition

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 35th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2020

Y2 - 15 March 2020 through 19 March 2020

ER -

Dai ZX, Chen WL, Lin CT, Xu MS, Chen KF. Cascadable Dual-Buck Multilevel Inverter Modules with Autonomous DC Capacitor Voltage Balance. In APEC 2020 - 35th Annual IEEE Applied Power Electronics Conference and Exposition. Institute of Electrical and Electronics Engineers Inc. 2020. p. 2446-2450. 9124155. (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC). doi: 10.1109/APEC39645.2020.9124155

Cascadable Dual-Buck Multilevel Inverter Modules with Autonomous DC Capacitor Voltage Balance

Abstract

Publication series

Conference

Bibliographical note

Keywords

UN SDGs

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