Characteristics optimization of N2O annealing on tungsten nanocrystal with W/Si dual-sputtered method for nonvolatile memory application

Jer Chyi Wang; Pai Chi Chou; Chao Sung Lai; Wen Hui Lee; Chi Fong Ai

doi:10.1016/j.microrel.2010.01.027

Characteristics optimization of N₂O annealing on tungsten nanocrystal with W/Si dual-sputtered method for nonvolatile memory application

Jer Chyi Wang, Pai Chi Chou, Chao Sung Lai^*, Wen Hui Lee, Chi Fong Ai

^*Corresponding author for this work

Department of Electronic Engineering

Research output: Contribution to journal › Journal Article › peer-review

3 Scopus citations

Abstract

The tungsten nanocrystals (W-NCs) memories fabricated by W/Si dual-sputtering and O₂ and N₂O annealing process were investigated. Significant W-NCs dots were formed by N₂O annealing and proved by the energy dispersive X-ray spectrometer (EDX) analysis. Superior electrical properties of W-NCs memories were optimized for 20/30 W/Si dual-sputtered ratio, 10-15 nm blocking oxide thickness and N₂O annealing at 950 °C. A pronounced capacitance-voltage hysteresis was observed with a memory window of 6.5 V under +9/-9 V sweeping.

Original language	English
Pages (from-to)	639-642
Number of pages	4
Journal	Microelectronics Reliability
Volume	50
Issue number	5
DOIs	https://doi.org/10.1016/j.microrel.2010.01.027
State	Published - 05 2010

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title = "Characteristics optimization of N2O annealing on tungsten nanocrystal with W/Si dual-sputtered method for nonvolatile memory application",

abstract = "The tungsten nanocrystals (W-NCs) memories fabricated by W/Si dual-sputtering and O2 and N2O annealing process were investigated. Significant W-NCs dots were formed by N2O annealing and proved by the energy dispersive X-ray spectrometer (EDX) analysis. Superior electrical properties of W-NCs memories were optimized for 20/30 W/Si dual-sputtered ratio, 10-15 nm blocking oxide thickness and N2O annealing at 950 °C. A pronounced capacitance-voltage hysteresis was observed with a memory window of 6.5 V under +9/-9 V sweeping.",

author = "Wang, {Jer Chyi} and Chou, {Pai Chi} and Lai, {Chao Sung} and Lee, {Wen Hui} and Ai, {Chi Fong}",

year = "2010",

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doi = "10.1016/j.microrel.2010.01.027",

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volume = "50",

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T1 - Characteristics optimization of N2O annealing on tungsten nanocrystal with W/Si dual-sputtered method for nonvolatile memory application

AU - Wang, Jer Chyi

AU - Chou, Pai Chi

AU - Lai, Chao Sung

AU - Lee, Wen Hui

AU - Ai, Chi Fong

PY - 2010/5

Y1 - 2010/5

N2 - The tungsten nanocrystals (W-NCs) memories fabricated by W/Si dual-sputtering and O2 and N2O annealing process were investigated. Significant W-NCs dots were formed by N2O annealing and proved by the energy dispersive X-ray spectrometer (EDX) analysis. Superior electrical properties of W-NCs memories were optimized for 20/30 W/Si dual-sputtered ratio, 10-15 nm blocking oxide thickness and N2O annealing at 950 °C. A pronounced capacitance-voltage hysteresis was observed with a memory window of 6.5 V under +9/-9 V sweeping.

AB - The tungsten nanocrystals (W-NCs) memories fabricated by W/Si dual-sputtering and O2 and N2O annealing process were investigated. Significant W-NCs dots were formed by N2O annealing and proved by the energy dispersive X-ray spectrometer (EDX) analysis. Superior electrical properties of W-NCs memories were optimized for 20/30 W/Si dual-sputtered ratio, 10-15 nm blocking oxide thickness and N2O annealing at 950 °C. A pronounced capacitance-voltage hysteresis was observed with a memory window of 6.5 V under +9/-9 V sweeping.

UR - http://www.scopus.com/inward/record.url?scp=77953134111&partnerID=8YFLogxK

U2 - 10.1016/j.microrel.2010.01.027

DO - 10.1016/j.microrel.2010.01.027

M3 - 文章

AN - SCOPUS:77953134111

SN - 0026-2714

VL - 50

SP - 639

EP - 642

JO - Microelectronics Reliability

JF - Microelectronics Reliability

IS - 5

ER -

Characteristics optimization of N₂O annealing on tungsten nanocrystal with W/Si dual-sputtered method for nonvolatile memory application

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