Combining evolution strategy with ordinal optimization

Shih Cheng Horng, Shin Yeu Lin*

*Corresponding author for this work

Research output: Contribution to journalJournal Article peer-review

3 Scopus citations

Abstract

In this paper, we combine evolution strategy (ES) with ordinal optimization (OO), abbreviated as ES + OO, to solve real-time combinatorial stochastic simulation optimization problems with huge discrete solution space. The first step of ES + OO is to use an artificial neural network (ANN) to construct a surrogate model to roughly evaluate the objective value of a solution. In the second step, we apply ES assisted by the ANN-based surrogate model to the considered problem to obtain a subset of good enough solutions. In the last step, we use the exact model to evaluate each solution in the good enough subset, and the best one is the final good enough solution. We apply the proposed algorithm to a wafer testing problem, which is formulated as a combinatorial stochastic simulation optimization problem that consists of a huge discrete solution space formed by the vector of threshold values in the testing process. We demonstrate that (a) ES + OO outperforms the combination of genetic algorithm (GA) with OO using extensive simulations in the wafer testing problem, and its computational efficiency is suitable for real-time application, (b) the merit of using OO approach in solving the considered problem and (c) ES + OO can obtain the approximate Pareto optimal solution of the multi-objective function resided in the considered problem. Above all, we propose a systematic procedure to evaluate the performance of ES + OO by providing a quantitative result.

Original languageEnglish
Pages (from-to)233-260
Number of pages28
JournalInternational Journal of Information Technology and Decision Making
Volume12
Issue number2
DOIs
StatePublished - 03 2013

Keywords

  • Evolution strategy
  • artificial neural network
  • combinatorial optimization
  • ordinal optimization
  • stochastic simulation optimization
  • wafer testing

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