Compact bit-parallel systolic montgomery multiplication over GF(2 m) generated by trinomials

Chiou Yng Lee*, Chin Chin Chen, Erl Huei Lu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

This paper presents a scalable and systolic Montgomery's algorithm in GF(2m) using the Hankel matrix-vector representation. The hardware architectures derived from this algorithm represents low-complexity bit-parallel systolic multipliers with trinomials. The results reveal that our proposed multiplier saves approximately 36% space complexity as compared to an existing systolic Montgomery multiplier for trinomials. Moreover, the proposed architectures have the features of regularity, modularity, and local interconnect ability. Accordingly, they are well suited for VLSI implementation.

Original languageEnglish
Title of host publication2006 IEEE Region 10 Conference, TENCON 2006
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)1424405491, 9781424405497
DOIs
StatePublished - 2006
Event2006 IEEE Region 10 Conference, TENCON 2006 - Hong Kong, China
Duration: 14 11 200617 11 2006

Publication series

NameIEEE Region 10 Annual International Conference, Proceedings/TENCON
ISSN (Print)2159-3442
ISSN (Electronic)2159-3450

Conference

Conference2006 IEEE Region 10 Conference, TENCON 2006
Country/TerritoryChina
CityHong Kong
Period14/11/0617/11/06

Keywords

  • Bit-parallel systolic multiplier
  • Hankel matrix-vector
  • Trinomial

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