Abstract
Among the reviews and discussions demonstrated in the literature, very little attention was paid to which logic style is the most for adiabatic and subthreshold techniques. This study tries to make up such a deficiency, with particular emphasis on two representative circuit structures. All the comparisons were based on 0.18-μm standard CMOS process.
Original language | English |
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Title of host publication | ISOCC 2014 - International SoC Design Conference |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 146-147 |
Number of pages | 2 |
ISBN (Electronic) | 9781479951260 |
DOIs | |
State | Published - 16 04 2015 |
Event | 11th International SoC Design Conference, ISOCC 2014 - Jeju, Korea, Republic of Duration: 03 11 2014 → 06 11 2014 |
Publication series
Name | ISOCC 2014 - International SoC Design Conference |
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Conference
Conference | 11th International SoC Design Conference, ISOCC 2014 |
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Country/Territory | Korea, Republic of |
City | Jeju |
Period | 03/11/14 → 06/11/14 |
Bibliographical note
Publisher Copyright:© 2014 IEEE.
Keywords
- CMOS
- adiabatic
- energy recovery
- subthreshold
- ultra-low power
- ultra-low voltage