Computer-aided engineering (CAE) for the microelectronic packaging process

Microelectronic encapsulation is an important process stage for production of integrated circuit (IC) chips. During this stage, the IC chips are enclosed in plastic packages that provide protection from hostile environments, facilitate heat dissipation, and enable chip electrical interconnection. Among existing encapsulation methods, plastic packaging with transfer molding accounts for more than 90% of the market share because of its high performance/cost ratio. However, the reactive nature of the thermosetting encapsulants and the complex geometries with molded-in silicon chip paddles, connecting wires and leadframes have complicated product design, material selection, tool making, and process control. This paper discusses the current development and application of computer-aided engineering (CAE) technology to microelectronic encapsulation. The author views CAE analysis as an engineering tool aimed at providing process insights and assisting engineers to cost-effectively reduce the defect level of IC packages and the time to market. Research topics that need to be included in future developments of CAE technology for microelectronic encapsulation are also discussed.