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Current path analysis for electrostatic discharge protection

  • Hung Yi Liu*
  • , Chung Wei Lin
  • , Szu Jui Chou
  • , Wei Ting Tu
  • , Chih Hung Liu
  • , Yao Wen Chang
  • , Sy Yen Kuo
  • *Corresponding author for this work
  • National Taiwan University

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

8 Scopus citations

Abstract

The electrostatic discharge (ESD) problem has become a challenging reliability issue in nanometer circuit design. High voltages resulted from ESD might cause high current densities in a small device and burn it out, so on-chip protection circuits for IC pads are required. To reduce the design cost, the protection circuit should be added only for the IC pads with an ESD current path, which arises the ESD current path analysis problem. In this paper, we first introduce the analysis problem for ESD protection in circuit design. We then model the circuit as a constrained graph, decompose ESD connected components linked with the pads, and apply the breadth-first search (BFS) to identify the ESD connected components in each constrained graph and thus the current paths. Experimental results show that our algorithm can detect all ESD paths very efficiently and economically. To our best knowledge, our algorithm is the first point tool available to the public for the ESD analysis.

Original languageEnglish
Title of host publicationProceedings of the 2006 International Conference on Computer-Aided Design, ICCAD
Pages510-515
Number of pages6
DOIs
StatePublished - 2006
Externally publishedYes
Event2006 International Conference on Computer-Aided Design, ICCAD - San Jose, CA, United States
Duration: 05 11 200609 11 2006

Publication series

NameIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
ISSN (Print)1092-3152

Conference

Conference2006 International Conference on Computer-Aided Design, ICCAD
Country/TerritoryUnited States
CitySan Jose, CA
Period05/11/0609/11/06

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