Design of a multiprocessor DSP chip for flexible information processing

Chia Fen Chang; Bing J. Sheu; Hiroto Okada

doi:10.1109/ICASSP.1992.226540

Design of a multiprocessor DSP chip for flexible information processing

Chia Fen Chang, Bing J. Sheu, Hiroto Okada

University of Southern California

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Architecture and custom circuit design of a multiprocessor chip for signal and image processing have been developed. Mappings of digital image processing and neural network algorithms are presented. The processor design supports the execution of key signal processing functions. The processing elements can be connected in a 1-D linear ring or 2-D systolic mesh array. A microprogrammed controller is used to enhance the processor performance. Each processor occupies 4.1 mm² by using an industrial-scalc 0.5-μm CMOS technology from TRW, Inc. Sixty-four processing elements can be implemented in a 1.5 x 1.8-cm² chip and achieves 2.56 billion calculations per second.

Original language	English
Title of host publication	ICASSP 1992 - 1992 International Conference on Acoustics, Speech, and Signal Processing
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	637-640
Number of pages	4
ISBN (Electronic)	0780305329
DOIs	https://doi.org/10.1109/ICASSP.1992.226540
State	Published - 1992
Externally published	Yes
Event	1992 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 1992 - San Francisco, United States Duration: 23 03 1992 → 26 03 1992

Publication series

Name	ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
Volume	5
ISSN (Print)	1520-6149

Conference

Conference	1992 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 1992
Country/Territory	United States
City	San Francisco
Period	23/03/92 → 26/03/92

Bibliographical note

Publisher Copyright:
© 1992 IEEE.

Access to Document

10.1109/ICASSP.1992.226540

Cite this

Chang, C. F., Sheu, B. J., & Okada, H. (1992). Design of a multiprocessor DSP chip for flexible information processing. In ICASSP 1992 - 1992 International Conference on Acoustics, Speech, and Signal Processing (pp. 637-640). Article 226540 (ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings; Vol. 5). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICASSP.1992.226540

Chang, Chia Fen ; Sheu, Bing J. ; Okada, Hiroto. / Design of a multiprocessor DSP chip for flexible information processing. ICASSP 1992 - 1992 International Conference on Acoustics, Speech, and Signal Processing. Institute of Electrical and Electronics Engineers Inc., 1992. pp. 637-640 (ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings).

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abstract = "Architecture and custom circuit design of a multiprocessor chip for signal and image processing have been developed. Mappings of digital image processing and neural network algorithms are presented. The processor design supports the execution of key signal processing functions. The processing elements can be connected in a 1-D linear ring or 2-D systolic mesh array. A microprogrammed controller is used to enhance the processor performance. Each processor occupies 4.1 mm2 by using an industrial-scalc 0.5-μm CMOS technology from TRW, Inc. Sixty-four processing elements can be implemented in a 1.5 x 1.8-cm2 chip and achieves 2.56 billion calculations per second.",

author = "Chang, {Chia Fen} and Sheu, {Bing J.} and Hiroto Okada",

note = "Publisher Copyright: {\textcopyright} 1992 IEEE.; 1992 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 1992 ; Conference date: 23-03-1992 Through 26-03-1992",

year = "1992",

doi = "10.1109/ICASSP.1992.226540",

language = "英语",

series = "ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "637--640",

booktitle = "ICASSP 1992 - 1992 International Conference on Acoustics, Speech, and Signal Processing",

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Chang, CF, Sheu, BJ & Okada, H 1992, Design of a multiprocessor DSP chip for flexible information processing. in ICASSP 1992 - 1992 International Conference on Acoustics, Speech, and Signal Processing., 226540, ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings, vol. 5, Institute of Electrical and Electronics Engineers Inc., pp. 637-640, 1992 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 1992, San Francisco, United States, 23/03/92. https://doi.org/10.1109/ICASSP.1992.226540

Design of a multiprocessor DSP chip for flexible information processing. / Chang, Chia Fen; Sheu, Bing J.; Okada, Hiroto.
ICASSP 1992 - 1992 International Conference on Acoustics, Speech, and Signal Processing. Institute of Electrical and Electronics Engineers Inc., 1992. p. 637-640 226540 (ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings; Vol. 5).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - Architecture and custom circuit design of a multiprocessor chip for signal and image processing have been developed. Mappings of digital image processing and neural network algorithms are presented. The processor design supports the execution of key signal processing functions. The processing elements can be connected in a 1-D linear ring or 2-D systolic mesh array. A microprogrammed controller is used to enhance the processor performance. Each processor occupies 4.1 mm2 by using an industrial-scalc 0.5-μm CMOS technology from TRW, Inc. Sixty-four processing elements can be implemented in a 1.5 x 1.8-cm2 chip and achieves 2.56 billion calculations per second.

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BT - ICASSP 1992 - 1992 International Conference on Acoustics, Speech, and Signal Processing

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Chang CF, Sheu BJ, Okada H. Design of a multiprocessor DSP chip for flexible information processing. In ICASSP 1992 - 1992 International Conference on Acoustics, Speech, and Signal Processing. Institute of Electrical and Electronics Engineers Inc. 1992. p. 637-640. 226540. (ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings). doi: 10.1109/ICASSP.1992.226540

Design of a multiprocessor DSP chip for flexible information processing

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