TY - GEN
T1 - Design of a neural recording amplifier with tunable pseudo resistors
AU - Yao, Kai Wen
AU - Gong, Cihun Siyong Alex
AU - Yang, Shan Ci
AU - Shiue, Muh Tian
PY - 2011
Y1 - 2011
N2 - This paper describes a voltage-controlled pseudo-resistor with widely available operating voltage range applied to neural recording amplifier designs. The proposed pseudo-resistor which consists of serial-connected PMOS device and an auto-tuning circuit provides ultra-high resistance to cancel DC offset from electrode-electrolyte interface. The proposed design has been estimated in standard CMOS 0.18-m process, achieving midband gain of 40 dB, bandwidth from 0.4 Hz to 7 kHz, input-referred noise of 5.98 Vrms, calculated NEF of 7.2, and 3.1-W power consumption.
AB - This paper describes a voltage-controlled pseudo-resistor with widely available operating voltage range applied to neural recording amplifier designs. The proposed pseudo-resistor which consists of serial-connected PMOS device and an auto-tuning circuit provides ultra-high resistance to cancel DC offset from electrode-electrolyte interface. The proposed design has been estimated in standard CMOS 0.18-m process, achieving midband gain of 40 dB, bandwidth from 0.4 Hz to 7 kHz, input-referred noise of 5.98 Vrms, calculated NEF of 7.2, and 3.1-W power consumption.
UR - https://www.scopus.com/pages/publications/84255194517
U2 - 10.1109/SOCC.2011.6085119
DO - 10.1109/SOCC.2011.6085119
M3 - 会议稿件
AN - SCOPUS:84255194517
SN - 9781457716164
T3 - International System on Chip Conference
SP - 376
EP - 379
BT - Proceedings - IEEE International SOC Conference, SOCC 2011
T2 - 24th IEEE International System on Chip Conference, SOCC 2011
Y2 - 26 September 2011 through 28 September 2011
ER -