Abstract
A novel approach to the design of digital and analog VLSI with built-in reliability is presented. Physics-based reliability models for key failure mechanisms in VLSI circuits are used to achieve accurate and efficient circuit-level reliability prediction and improvement. A prototype integrated-circuit reliability simulator (RELY) and experimental results on hot-carrier damage and metal electromigration effects are presented.
| Original language | English |
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| Pages | 496-499 |
| Number of pages | 4 |
| State | Published - 1989 |
| Externally published | Yes |
| Event | Proceedings - 1989 IEEE International Conference on Computer Design: VLSI in Computers & Processors - Cambridge, MA, USA Duration: 02 10 1989 → 04 10 1989 |
Conference
| Conference | Proceedings - 1989 IEEE International Conference on Computer Design: VLSI in Computers & Processors |
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| City | Cambridge, MA, USA |
| Period | 02/10/89 → 04/10/89 |