Digital design and implementation of fast power data detector

Wei Neng Chang*, Wei Hao Peng, Kuan Dih Yeh

*Corresponding author for this work

Research output: Contribution to conferenceConference Paperpeer-review

3 Scopus citations

Abstract

This paper introduces the digital design and implementation of a fast power data detector operated for the fundamental frequency (50 or 60 Hz). The detector can measure the complete power data, including rms values of current and voltage, real and imaginary powers, complex power, and power factor simultaneously with quick response time. First, the detection equations are derived. Then, the simulation is made to verify the effectiveness of detection. Finally, the digital implementation is accomplished by using the TMS320C31 floating-point DSP. The experimental results are given for verification.

Original languageEnglish
Pages623-627
Number of pages5
StatePublished - 2001
Event4th IEEE International Conference on Power Electronics and Drive Systems - Denpasar, Bali, Indonesia
Duration: 22 10 200125 10 2001

Conference

Conference4th IEEE International Conference on Power Electronics and Drive Systems
Country/TerritoryIndonesia
CityDenpasar, Bali
Period22/10/0125/10/01

Keywords

  • DSP
  • Digital implementation
  • Fast detection
  • Power data

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