Digitally controlled boost converter with digital DLL based calibration

Jen Hou Wu, Shao Ku Kao

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper presents the digitally controlled boost converter with delay-locked loop (DLL) to enhance the resolution. We propose two novel circuits: all digital ramp generator for coarse tuning and DPWM with build-in DLL for calibration. This circuit is designed in 0.35μm CMOS process. The input voltage range is from 3.3V to 4.2V with output voltage of 5V. The maximum efficiency is 90 % at loading current to be 500 mA.

Original languageEnglish
Title of host publication2013 IEEE 10th International Conference on Power Electronics and Drive Systems, PEDS 2013
Pages541-545
Number of pages5
DOIs
StatePublished - 2013
Event2013 IEEE 10th International Conference on Power Electronics and Drive Systems, PEDS 2013 - Kitakyushu, Japan
Duration: 22 04 201325 04 2013

Publication series

NameProceedings of the International Conference on Power Electronics and Drive Systems

Conference

Conference2013 IEEE 10th International Conference on Power Electronics and Drive Systems, PEDS 2013
Country/TerritoryJapan
CityKitakyushu
Period22/04/1325/04/13

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