TY - JOUR
T1 - Distinction between interfacial layer effect and trap passivation effect of N2 plasma treatment on LTPS-TFTs
AU - Ma, William Cheng Yu
PY - 2014/10
Y1 - 2014/10
N2 - In this paper, N2 plasma surface treatment on high performance low-temperature poly-Si thin-film transistors (LTPS-TFTs) with HfO2 gate dielectric is demonstrated. A significant performance improvement by N 2 plasma surface treatment is observed, including the threshold voltage VTH reduction ∼ -0.94 V, subthreshold swing S.S. improvement from 0.227 V/dec. to 0.188 V/dec., field effect mobility μFE enhancement ∼ +61% and driving current Idrv enhancement ∼ +95%. The individual impacts of interfacial layer growth effect and trap passivation effect of poly-Si channel film are investigated by the plasma induced interfacial layer (PIL) removal process. The results show that the PIL growth effect has more contribution to the improvement of V TH reduction and Idrv enhancement than the trap passivation effect of poly-Si channel film. Consequently, the interfacial layer engineering would be very important for the development of high performance LTPS-TFTs.
AB - In this paper, N2 plasma surface treatment on high performance low-temperature poly-Si thin-film transistors (LTPS-TFTs) with HfO2 gate dielectric is demonstrated. A significant performance improvement by N 2 plasma surface treatment is observed, including the threshold voltage VTH reduction ∼ -0.94 V, subthreshold swing S.S. improvement from 0.227 V/dec. to 0.188 V/dec., field effect mobility μFE enhancement ∼ +61% and driving current Idrv enhancement ∼ +95%. The individual impacts of interfacial layer growth effect and trap passivation effect of poly-Si channel film are investigated by the plasma induced interfacial layer (PIL) removal process. The results show that the PIL growth effect has more contribution to the improvement of V TH reduction and Idrv enhancement than the trap passivation effect of poly-Si channel film. Consequently, the interfacial layer engineering would be very important for the development of high performance LTPS-TFTs.
KW - Interfacial layer
KW - Plasma passivation
KW - Thin-film transistors (TFTs)
UR - http://www.scopus.com/inward/record.url?scp=84905017440&partnerID=8YFLogxK
U2 - 10.1016/j.sse.2014.07.005
DO - 10.1016/j.sse.2014.07.005
M3 - 文章
AN - SCOPUS:84905017440
SN - 0038-1101
VL - 100
SP - 45
EP - 48
JO - Solid-State Electronics
JF - Solid-State Electronics
ER -