Abstract
A duty cycle control circuit for clock signals is presented. The proposed circuit uses a rising edge detector to generate one shot output signals which have the same frequency of the input clock signal. A pulse width controllable monostable multivibrator converts the one shot signals into rectangular pulses. By using the feedback control voltage from an operational amplifier, the pulse width of generated rectangular pulses is automatically adjusted to a pre-set duty cycle. As compared to prior arts, features of this proposed circuit include simple design, low cost and less power. Furthermore, a novel design approach for frequency dividers by the proposed duty cycle control circuit is also demonstrated.
Original language | English |
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Title of host publication | Proceedings of ICECS 1999 - 6th IEEE International Conference on Electronics, Circuits and Systems |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 1619-1622 |
Number of pages | 4 |
ISBN (Electronic) | 0780356829 |
DOIs | |
State | Published - 1999 |
Event | 6th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1999 - Pafos, Cyprus Duration: 05 09 1999 → 08 09 1999 |
Publication series
Name | Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems |
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Volume | 3 |
Conference
Conference | 6th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1999 |
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Country/Territory | Cyprus |
City | Pafos |
Period | 05/09/99 → 08/09/99 |
Bibliographical note
Publisher Copyright:© 1999 IEEE.