Abstract
In this letter, we proposed a metal-oxide-high-k-oxide-silicon-type (MOHOS) memory structure incorporating a high-k Yb2 TiO5 charge trapping layer and the subsequent postdeposition annealing treatment. The effect of postdeposition annealing on the structural properties of Yb2 TiO5 charge trapping layers was explored by x-ray diffraction, transmission electron microscopy, and x-ray photoelectron spectroscopy. The Yb2 TiO5 MOHOS-type device annealed at 800 °C exhibited a larger memory window of 2.8 V and a smaller charge loss of 10% than did those prepared at other annealing temperatures. This outcome is attributed to the higher probability for trapping the charge carrier due to the formation of a well-crystallized Yb2 TiO5 structure and a thin low-k interfacial layer.
| Original language | English |
|---|---|
| Article number | 162901 |
| Journal | Applied Physics Letters |
| Volume | 96 |
| Issue number | 16 |
| DOIs | |
| State | Published - 19 04 2010 |