Efficient bit-parallel subcircuit extraction using CUDA

Che Lun Hung, Chun Yuan Lin*, Chia Shin Ou, Yuan Hong Tseng, Po Yen Hung, Ship Peng Li, Chun Ting Fu

*Corresponding author for this work

    Research output: Contribution to journalJournal Article peer-review

    2 Scopus citations

    Abstract

    Wafer processing technology has been improving rapidly. Moore's law has been exceeded as the number of transistors in a dense integrated circuit, now increases threefold or more, approximately every year. The integrated circuit has gone from very large scale to giga large scale. The extraction of subcircuits has therefore become computation-intensive. In this paper, we propose an efficient bit-parallel subcircuit extraction algorithm using graphic processing units. We conducted experimental trials and demonstrated that the proposed algorithm can achieve high throughput, suggesting practical applications in the extraction of subcircuits.

    Original languageEnglish
    Pages (from-to)4326-4338
    Number of pages13
    JournalConcurrency and Computation: Practice and Experience
    Volume28
    Issue number16
    DOIs
    StatePublished - 01 11 2016

    Bibliographical note

    Publisher Copyright:
    Copyright © 2015 John Wiley & Sons, Ltd.

    Keywords

    • GPU
    • graphics processing units
    • integrated circuit
    • subcircuit

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