TY - GEN
T1 - Efficient CMOS rectifier for inductively power-harvested implants
AU - Gong, Cihun Siyong Alex
AU - Lu, Jyun Wei
AU - Yao, Kai Wen
AU - Tsai, Jr Yu
AU - Shiue, Muh Tian
PY - 2008
Y1 - 2008
N2 - A fully integrated CMOS rectifier, intended for inductively powered electronic implants and featuring ultralow-loss characteristic, is presented. By making use of highperformance active diodes fulfilling almost ideal switching (zero forward voltage drop) and circuit to be provided with negative resistance, the proposed design is able to achieve an maximum conversion efficiency of more than 90% when designed in a 0.18-μm standard CMOS process, without any special device requiring additional manufacturing procedures. As a result, the proposed design dramatically reduces the production cost. Estimations in all aspects regarding the performance of the rectifier are given in this paper.
AB - A fully integrated CMOS rectifier, intended for inductively powered electronic implants and featuring ultralow-loss characteristic, is presented. By making use of highperformance active diodes fulfilling almost ideal switching (zero forward voltage drop) and circuit to be provided with negative resistance, the proposed design is able to achieve an maximum conversion efficiency of more than 90% when designed in a 0.18-μm standard CMOS process, without any special device requiring additional manufacturing procedures. As a result, the proposed design dramatically reduces the production cost. Estimations in all aspects regarding the performance of the rectifier are given in this paper.
UR - http://www.scopus.com/inward/record.url?scp=63249091118&partnerID=8YFLogxK
U2 - 10.1109/EDSSC.2008.4760723
DO - 10.1109/EDSSC.2008.4760723
M3 - 会议稿件
AN - SCOPUS:63249091118
SN - 9781424425402
T3 - 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC
BT - 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC
T2 - 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC
Y2 - 8 December 2008 through 10 December 2008
ER -