Efficient job-release plan development for semiconductor assembly and testing in GA

Kung Jeng Wang; Chun Chih Chiu; Dah Chuan Gong

doi:10.1109/ICMLC.2010.5580909

Efficient job-release plan development for semiconductor assembly and testing in GA

Kung Jeng Wang, Chun Chih Chiu, Dah Chuan Gong^*

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

Taiwan's semiconductor integrated circuit (IC) industry plays an important role in the world and has maintained a major market share, especially, in the business of IC's packaging and testing. In the past, many studies have discussed job-release models for upstream IC manufacturing, but few emphasize on the IC turnkey factory, which including IC assembly and testing operations. In this paper, a job-release strategy for an IC turnkey factory with known assembly cycle time will be proposed. Concerning objectives under limited-capacity resources are (1) increasing the overall equipment efficiency (OEE) of IC test equipments, (2) reducing the fabrication cycle time, and (3) increasing the on-time delivery (OTD) rate. A genetic algorithm (GA) is applied to obtain an efficient job-release plan based on the data of an IC turnkey factory in Taiwan.

Original language	English
Title of host publication	2010 International Conference on Machine Learning and Cybernetics, ICMLC 2010
Pages	1205-1210
Number of pages	6
DOIs	https://doi.org/10.1109/ICMLC.2010.5580909
State	Published - 2010
Externally published	Yes
Event	2010 International Conference on Machine Learning and Cybernetics, ICMLC 2010 - Qingdao, China Duration: 11 07 2010 → 14 07 2010

Publication series

Name	2010 International Conference on Machine Learning and Cybernetics, ICMLC 2010
Volume	3

Conference

Conference	2010 International Conference on Machine Learning and Cybernetics, ICMLC 2010
Country/Territory	China
City	Qingdao
Period	11/07/10 → 14/07/10

Keywords

Genetic algorithm
IC testing
IC turnkey factory
Job-release

Access to Document

10.1109/ICMLC.2010.5580909

Cite this

Wang, K. J., Chiu, C. C., & Gong, D. C. (2010). Efficient job-release plan development for semiconductor assembly and testing in GA. In 2010 International Conference on Machine Learning and Cybernetics, ICMLC 2010 (pp. 1205-1210). Article 5580909 (2010 International Conference on Machine Learning and Cybernetics, ICMLC 2010; Vol. 3). https://doi.org/10.1109/ICMLC.2010.5580909

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title = "Efficient job-release plan development for semiconductor assembly and testing in GA",

abstract = "Taiwan's semiconductor integrated circuit (IC) industry plays an important role in the world and has maintained a major market share, especially, in the business of IC's packaging and testing. In the past, many studies have discussed job-release models for upstream IC manufacturing, but few emphasize on the IC turnkey factory, which including IC assembly and testing operations. In this paper, a job-release strategy for an IC turnkey factory with known assembly cycle time will be proposed. Concerning objectives under limited-capacity resources are (1) increasing the overall equipment efficiency (OEE) of IC test equipments, (2) reducing the fabrication cycle time, and (3) increasing the on-time delivery (OTD) rate. A genetic algorithm (GA) is applied to obtain an efficient job-release plan based on the data of an IC turnkey factory in Taiwan.",

keywords = "Genetic algorithm, IC testing, IC turnkey factory, Job-release",

author = "Wang, {Kung Jeng} and Chiu, {Chun Chih} and Gong, {Dah Chuan}",

year = "2010",

doi = "10.1109/ICMLC.2010.5580909",

language = "英语",

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}

Wang, KJ, Chiu, CC & Gong, DC 2010, Efficient job-release plan development for semiconductor assembly and testing in GA. in 2010 International Conference on Machine Learning and Cybernetics, ICMLC 2010., 5580909, 2010 International Conference on Machine Learning and Cybernetics, ICMLC 2010, vol. 3, pp. 1205-1210, 2010 International Conference on Machine Learning and Cybernetics, ICMLC 2010, Qingdao, China, 11/07/10. https://doi.org/10.1109/ICMLC.2010.5580909

Efficient job-release plan development for semiconductor assembly and testing in GA. / Wang, Kung Jeng; Chiu, Chun Chih; Gong, Dah Chuan.
2010 International Conference on Machine Learning and Cybernetics, ICMLC 2010. 2010. p. 1205-1210 5580909 (2010 International Conference on Machine Learning and Cybernetics, ICMLC 2010; Vol. 3).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Efficient job-release plan development for semiconductor assembly and testing in GA

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Keywords

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