Enhancement of drain current in vertical SiGe/Si PMOS transistors using novel CMOS technology

K. C. Liu*, S. K. Ray, S. K. Oswal, N. B. Chakraborti, R. D. Chang, D. L. Kencke, S. K. Banerjee

*Corresponding author for this work

Research output: Contribution to conferenceConference Paperpeer-review

3 Scopus citations

Abstract

A vertical Si1-xGex/Si positive metal oxide semiconductor (PMOS) and Si negative metal oxide semiconductor (NMOS) transistors were proposed. The crystalline quality for the strained SiGe layer was examined using high resolution double crystal X-ray diffraction. The linear peak conductance of the SiGe device is greater than the control Si device which indicates that there is an enhancement of out-of-plane hole mobility in a strained SiGe layer.

Original languageEnglish
Pages128-129
Number of pages2
StatePublished - 1997
Externally publishedYes
EventProceedings of the 1997 55th Annual Device Research Conference - Fort Collins, CO, USA
Duration: 23 06 199725 06 1997

Conference

ConferenceProceedings of the 1997 55th Annual Device Research Conference
CityFort Collins, CO, USA
Period23/06/9725/06/97

Fingerprint

Dive into the research topics of 'Enhancement of drain current in vertical SiGe/Si PMOS transistors using novel CMOS technology'. Together they form a unique fingerprint.

Cite this