Evaluation of strength tests of Cu TSV chips using acoustic emission method

F. C. Lu; H. T. Keng; H. Y. Liu; M. Y. Tsai; P. C. Lin

doi:10.1109/ICEP.2016.7486832

Evaluation of strength tests of Cu TSV chips using acoustic emission method

F. C. Lu
, H. T. Keng
, H. Y. Liu
, M. Y. Tsai^*
, P. C. Lin

^*Corresponding author for this work

Department of Mechanical Engineering

Chang Gung University
Nanya Technology Corporation

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

The purpose of this study is to evaluate the strength of TSV silicon chips using a point-load on elastic foundation (PoEF) test, associated with an acoustic emission (AE) method for detecting local material cracks or delamination occurring during the test before the chip breaking (or catastrophic failure). The results indicate that there are no larger-than-25 dB AE signals and no via cracks occurring before the chip breaking. However, the delamination between copper cap and silicon dioxide surface (due to poor adhesion), and bond pad crash on loading contact were found occurring with 50 dB of AE signals, respectively. It has been concluded that the strength of TSV chip is governed by the via interfacial crack failure occurring right at the maximum load.

Original language	English
Title of host publication	2016 International Conference on Electronics Packaging, ICEP 2016
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	294-297
Number of pages	4
ISBN (Electronic)	9784904090176
DOIs	https://doi.org/10.1109/ICEP.2016.7486832
State	Published - 07 06 2016
Event	2016 International Conference on Electronics Packaging, ICEP 2016 - Hokkaido, Japan Duration: 20 04 2016 → 22 04 2016

Publication series

Name	2016 International Conference on Electronics Packaging, ICEP 2016

Conference

Conference	2016 International Conference on Electronics Packaging, ICEP 2016
Country/Territory	Japan
City	Hokkaido
Period	20/04/16 → 22/04/16

Bibliographical note

Publisher Copyright:
© 2016 The Japan Institute of Electronics Packaging.

Keywords

3-D IC
Acoustic emission
Chip strength
Copper TSV
Cracks
Delamination

Access to Document

10.1109/ICEP.2016.7486832

Cite this

Lu, F. C., Keng, H. T., Liu, H. Y., Tsai, M. Y., & Lin, P. C. (2016). Evaluation of strength tests of Cu TSV chips using acoustic emission method. In 2016 International Conference on Electronics Packaging, ICEP 2016 (pp. 294-297). Article 7486832 (2016 International Conference on Electronics Packaging, ICEP 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICEP.2016.7486832

@inproceedings{de3728c612ef447d92af0c0af5b4da68,

title = "Evaluation of strength tests of Cu TSV chips using acoustic emission method",

abstract = "The purpose of this study is to evaluate the strength of TSV silicon chips using a point-load on elastic foundation (PoEF) test, associated with an acoustic emission (AE) method for detecting local material cracks or delamination occurring during the test before the chip breaking (or catastrophic failure). The results indicate that there are no larger-than-25 dB AE signals and no via cracks occurring before the chip breaking. However, the delamination between copper cap and silicon dioxide surface (due to poor adhesion), and bond pad crash on loading contact were found occurring with 50 dB of AE signals, respectively. It has been concluded that the strength of TSV chip is governed by the via interfacial crack failure occurring right at the maximum load.",

keywords = "3-D IC, Acoustic emission, Chip strength, Copper TSV, Cracks, Delamination",

author = "Lu, \{F. C.\} and Keng, \{H. T.\} and Liu, \{H. Y.\} and Tsai, \{M. Y.\} and Lin, \{P. C.\}",

note = "Publisher Copyright: {\textcopyright} 2016 The Japan Institute of Electronics Packaging.; 2016 International Conference on Electronics Packaging, ICEP 2016 ; Conference date: 20-04-2016 Through 22-04-2016",

year = "2016",

month = jun,

day = "7",

doi = "10.1109/ICEP.2016.7486832",

language = "英语",

series = "2016 International Conference on Electronics Packaging, ICEP 2016",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "294--297",

booktitle = "2016 International Conference on Electronics Packaging, ICEP 2016",

address = "美国",

}

Lu, FC, Keng, HT, Liu, HY, Tsai, MY & Lin, PC 2016, Evaluation of strength tests of Cu TSV chips using acoustic emission method. in 2016 International Conference on Electronics Packaging, ICEP 2016., 7486832, 2016 International Conference on Electronics Packaging, ICEP 2016, Institute of Electrical and Electronics Engineers Inc., pp. 294-297, 2016 International Conference on Electronics Packaging, ICEP 2016, Hokkaido, Japan, 20/04/16. https://doi.org/10.1109/ICEP.2016.7486832

Evaluation of strength tests of Cu TSV chips using acoustic emission method. / Lu, F. C.; Keng, H. T.; Liu, H. Y. et al.
2016 International Conference on Electronics Packaging, ICEP 2016. Institute of Electrical and Electronics Engineers Inc., 2016. p. 294-297 7486832 (2016 International Conference on Electronics Packaging, ICEP 2016).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Evaluation of strength tests of Cu TSV chips using acoustic emission method

AU - Lu, F. C.

AU - Keng, H. T.

AU - Liu, H. Y.

AU - Tsai, M. Y.

AU - Lin, P. C.

PY - 2016/6/7

Y1 - 2016/6/7

N2 - The purpose of this study is to evaluate the strength of TSV silicon chips using a point-load on elastic foundation (PoEF) test, associated with an acoustic emission (AE) method for detecting local material cracks or delamination occurring during the test before the chip breaking (or catastrophic failure). The results indicate that there are no larger-than-25 dB AE signals and no via cracks occurring before the chip breaking. However, the delamination between copper cap and silicon dioxide surface (due to poor adhesion), and bond pad crash on loading contact were found occurring with 50 dB of AE signals, respectively. It has been concluded that the strength of TSV chip is governed by the via interfacial crack failure occurring right at the maximum load.

AB - The purpose of this study is to evaluate the strength of TSV silicon chips using a point-load on elastic foundation (PoEF) test, associated with an acoustic emission (AE) method for detecting local material cracks or delamination occurring during the test before the chip breaking (or catastrophic failure). The results indicate that there are no larger-than-25 dB AE signals and no via cracks occurring before the chip breaking. However, the delamination between copper cap and silicon dioxide surface (due to poor adhesion), and bond pad crash on loading contact were found occurring with 50 dB of AE signals, respectively. It has been concluded that the strength of TSV chip is governed by the via interfacial crack failure occurring right at the maximum load.

KW - 3-D IC

KW - Acoustic emission

KW - Chip strength

KW - Copper TSV

KW - Cracks

KW - Delamination

UR - https://www.scopus.com/pages/publications/84978280319

U2 - 10.1109/ICEP.2016.7486832

DO - 10.1109/ICEP.2016.7486832

M3 - 会议稿件

AN - SCOPUS:84978280319

T3 - 2016 International Conference on Electronics Packaging, ICEP 2016

SP - 294

EP - 297

BT - 2016 International Conference on Electronics Packaging, ICEP 2016

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2016 International Conference on Electronics Packaging, ICEP 2016

Y2 - 20 April 2016 through 22 April 2016

ER -

Evaluation of strength tests of Cu TSV chips using acoustic emission method

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Keywords

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