Excellent resistive switching memory: Influence of GeO x in WO x mixture

S. Z. Rahaman*, S. Maikap, W. S. Chen, T. C. Tien, H. Y. Lee, F. T. Chen, M. J. Kao, M. J. Tsai

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

Influence of GeO x layer on resistive switching memory performance in a simple and CMOS compatible W/WO x/GeO x:WO x mixture/W structure has been investigated for the first time. All layers are confirmed by both HRTEM and XPS. This memory device has enhanced performance in terms of the resistance ratio, uniformity, and program/erase cycles as compared to W/WO x/W structure. An excellent read endurance and program/erase cycles of >10 6 at large V read of ±1V are obtained. Furthermore, the memory device exhibits robust data retention at 85°C. This device can be operated as low current as 0.1 μA.

Original languageEnglish
Title of host publication2012 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2012 - Proceedings of Technical Papers
DOIs
StatePublished - 2012
Event2012 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2012 - Hsinchu, Taiwan
Duration: 23 04 201225 04 2012

Publication series

NameInternational Symposium on VLSI Technology, Systems, and Applications, Proceedings
ISSN (Print)1930-8868

Conference

Conference2012 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2012
Country/TerritoryTaiwan
CityHsinchu
Period23/04/1225/04/12

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