@inproceedings{93a4e4ed2eb3414ca768801bd8200824,
title = "Exploiting instruction-level parallelism with the conjugate register file scheme",
abstract = "This paper proposes a new micro-architecture, called IAS-S, which takes advantage of the Conjugate Register File (CRF) scheme to support speculative execution, such as multi-level boosting and multi-way branch, without incurring excessive hardware overhead. A software technique which integrates register allocation and instruction scheduling has been developed to exploit the conjugate register file. The scheduling-conflict graph is built before the starting of register allocation so that the ability of the instruction scheduler to optimize the instruction sequence will not be severely restricted by the reuse of registers.",
author = "Chang, {Meng chou} and Feipei Lai and Shang, {Rung ji}",
year = "1992",
doi = "10.1145/144965.144986",
language = "英语",
isbn = "0818631759",
series = "Proceedings of the 25th Annual International Symposium on Microarchitecture",
publisher = "Publ by ACM",
pages = "29--32",
booktitle = "Proceedings of the 25th Annual International Symposium on Microarchitecture",
note = "Proceedings of the 25th Annual International Symposium on Microarchitecture ; Conference date: 01-12-1992 Through 04-12-1992",
}