Field-plate technique for high power compound semiconductor devices applications

Hsien Chin Chiu*, Chao Wei Lin, Che Kai Lin

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

The field-plate (FP) technique for GaAs-based pseudomorphic high electron mobility transistors (pHEMTs) was discussed with various FP voltage, metal connection, and breakdown mechanism. In addition, these mechanisms of devices were also evaluated experimentally by their microwave and power performance. For breakdown voltage mechanism investigation, the design of experiment (DOE) with 16 transistors was adopted, the FP length extension exhibited a high efficiency to improve off-state breakdown voltage (BVoff) due its high suppression ability to thermionic-field emission (TFE) of gate electrons. However, FP induced depletion region is difficult to suppress channel impact-ionization mechanism which dominated the on-state breakdown voltage (BVon). In addition, FP length extension is beneficial for improving device flicker noise caused by surface states and GR width extension shows an opposite trend because un-cap Schottky layer exposure area is also increased with longer GR width extension.

Original languageEnglish
Title of host publication2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010
DOIs
StatePublished - 2010
Event2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010 - Hong Kong, China
Duration: 15 12 201017 12 2010

Publication series

Name2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010

Conference

Conference2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010
Country/TerritoryChina
CityHong Kong
Period15/12/1017/12/10

Keywords

  • Field-plate
  • Flicker noise
  • GaAs
  • Linearity
  • PHEMT
  • Power

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