Gate capacitance effect on P-type tunnel thin-film transistor with TiN/HfZrO2 gate stack

William Cheng Yu Ma*, Ming Jhe Li, Shen Ming Luo, Jiun Hung Lin, Cai Jia Tsai

*Corresponding author for this work

Research output: Contribution to journalJournal Article peer-review

2 Scopus citations

Abstract

In this work, the polycrystalline-silicon (poly-Si) tunnel field-effect thin-film transistors (TFETs) with TiN/HfZrO2 gate stack materials are demonstrated to exhibit low threshold voltage ~ –1.218 V, subthreshold swing (SS) ~ 0.311 V/decade and channel length insensitive transfer characteristics. Conventional carrier transport mechanism of poly-Si thin-film transistors (TFTs) is the thermionic emission with scattering effect, which is deduced as the drift-diffusion transport model with additional trap state induced energy barrier height, resulting in the stronger channel length dependence effect. For the poly-Si TFETs, the carrier transport mechanism is the interband tunneling, including band-to-band tunneling and trap-assisted tunneling, which is less affected by the channel length. The different carrier transport mechanisms of poly-Si TFETs and TFTs would lead to different gate dielectric thickness effect. When the thickness of gate dielectric HfZrO2 is reduced from 18 to 10 nm to increase the gate capacitance density, the SS and on-state current of poly-Si TFETs exhibit much higher improvement than them of poly-Si TFTs. It indicates that the high gate capacitance density is a key parameter for the development of poly-Si TFETs to replace the conventional poly-Si TFTs in three-dimensional integrated circuit applications.

Original languageEnglish
Article number137818
JournalThin Solid Films
Volume697
DOIs
StatePublished - 01 03 2020
Externally publishedYes

Bibliographical note

Publisher Copyright:
© 2020 Elsevier B.V.

Keywords

  • Gate capacitance
  • Polycrystalline-silicon channel
  • Thin-film transistors
  • Tunnel field-effect transistors

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