Abstract
In this work, graphene nanodots have been fabricated and characterized as it has the potential for nanodevices application. Here we show non-volatile memory devices based on the capacitor structure by using graphene nanodots as the charge storage nodes. The graphene nanodots on silicon dioxide tunneling barrier were fabricated by etching the graphene with gold nanoparticles as self-aligned mask. Furthermore, different blocking oxide layer were also adopted to optimize the memory characteristics, including retention and operation speed. The memory of graphene nanodots with high-k blocking oxide layer shows higher flat-band voltage shift at low programming voltage, and excellent charge loss less than 12% after 104 sec, potentially provides a promising route for non-volatile memory application.
| Original language | English |
|---|---|
| Title of host publication | Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017 |
| Editors | Yajie Qin, Zhiliang Hong, Ting-Ao Tang |
| Publisher | IEEE Computer Society |
| Pages | 433-435 |
| Number of pages | 3 |
| ISBN (Electronic) | 9781509066247 |
| DOIs | |
| State | Published - 01 07 2017 |
| Event | 12th IEEE International Conference on Advanced Semiconductor Integrated Circuits, ASICON 2017 - Guiyang, China Duration: 25 10 2017 → 28 10 2017 |
Publication series
| Name | Proceedings of International Conference on ASIC |
|---|---|
| Volume | 2017-October |
| ISSN (Print) | 2162-7541 |
| ISSN (Electronic) | 2162-755X |
Conference
| Conference | 12th IEEE International Conference on Advanced Semiconductor Integrated Circuits, ASICON 2017 |
|---|---|
| Country/Territory | China |
| City | Guiyang |
| Period | 25/10/17 → 28/10/17 |
Bibliographical note
Publisher Copyright:© 2017 IEEE.