Heterogeneous Memory Allocation Scheme for Batch Jobs with Intel Optane DC Persistent Memory and DRAM

Che Wei Chang*, Kai Jie Zhang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

It is a promising approach to include Non-Volatile Memory (NVM) and DRAM together as the main memory to provide huge memory space for large objects and guarantee short access latency for frequent writes and reads. To provide feasible and suitable memory allocation for all applications on a sever, our solution analyzes applications to derive the read-write ratio, memory footprint, and access pattern of each application. Heterogenous memory allocation scheme is then developed to reduce the makespan of batch jobs.

Original languageEnglish
Title of host publication2023 9th International Conference on Applied System Innovation, ICASI 2023
EditorsShoou-Jinn Chang, Sheng-Joue Young, Artde Donald Kin-Tak Lam, Liang-Wen Ji, Stephen D. Prior
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages166-168
Number of pages3
ISBN (Electronic)9798350398380
DOIs
StatePublished - 2023
Event9th International Conference on Applied System Innovation, ICASI 2023 - Chiba, Japan
Duration: 21 04 202325 04 2023

Publication series

Name2023 9th International Conference on Applied System Innovation, ICASI 2023

Conference

Conference9th International Conference on Applied System Innovation, ICASI 2023
Country/TerritoryJapan
CityChiba
Period21/04/2325/04/23

Bibliographical note

Publisher Copyright:
© 2023 IEEE.

Keywords

  • batch jobs
  • heterogeneous memory
  • makespan
  • non-volatile memory

Fingerprint

Dive into the research topics of 'Heterogeneous Memory Allocation Scheme for Batch Jobs with Intel Optane DC Persistent Memory and DRAM'. Together they form a unique fingerprint.

Cite this