High-κ material sidewall with source/drain-to-gate non-overlapped structure for low standby power applications

Ming Wen Ma; Tien Sheng Chao; Kuo Hsing Kao; Jyun Siang Huang; Tan Fu Lei

doi:10.1143/JJAP.45.8656

High-κ material sidewall with source/drain-to-gate non-overlapped structure for low standby power applications

Ming Wen Ma^*
, Tien Sheng Chao
, Kuo Hsing Kao
, Jyun Siang Huang
, Tan Fu Lei

^*Corresponding author for this work

National Yang Ming Chiao Tung University

Research output: Contribution to journal › Journal Article › peer-review

Abstract

In this paper, fully depleted silicon-on-insulator (SOI) devices with source/drain extension shifts and a high-κ offset spacers were investigated in detail. The calculated results show that the source/drain extension shift can decrease off-state leakage current I_off significantly by utilizing the extra electron barrier height in the source/drain extension shift region to reduce standby power dissipation. However, the on-state driving current I_on is also sacrificed simultaneously. To overcome this drawback, a high-κ offset spacer is used to increase the on-state driving current I_on effectively by enhancing the vertical fringing electric field which elevates the channel voltage drop and reduces series resistance.

Original language	English
Pages (from-to)	8656-8658
Number of pages	3
Journal	Japanese Journal of Applied Physics
Volume	45
Issue number	11
DOIs	https://doi.org/10.1143/JJAP.45.8656
State	Published - 15 11 2006
Externally published	Yes

Keywords

Fringing electric field
High-κ offset spacer dielectric
S/D extension shift
Silicon-on-insulator (SOI)

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10.1143/JJAP.45.8656

Cite this

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title = "High-κ material sidewall with source/drain-to-gate non-overlapped structure for low standby power applications",

abstract = "In this paper, fully depleted silicon-on-insulator (SOI) devices with source/drain extension shifts and a high-κ offset spacers were investigated in detail. The calculated results show that the source/drain extension shift can decrease off-state leakage current Ioff significantly by utilizing the extra electron barrier height in the source/drain extension shift region to reduce standby power dissipation. However, the on-state driving current Ion is also sacrificed simultaneously. To overcome this drawback, a high-κ offset spacer is used to increase the on-state driving current Ion effectively by enhancing the vertical fringing electric field which elevates the channel voltage drop and reduces series resistance.",

keywords = "Fringing electric field, High-κ offset spacer dielectric, S/D extension shift, Silicon-on-insulator (SOI)",

author = "Ma, \{Ming Wen\} and Chao, \{Tien Sheng\} and Kao, \{Kuo Hsing\} and Huang, \{Jyun Siang\} and Lei, \{Tan Fu\}",

year = "2006",

month = nov,

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doi = "10.1143/JJAP.45.8656",

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T1 - High-κ material sidewall with source/drain-to-gate non-overlapped structure for low standby power applications

AU - Ma, Ming Wen

AU - Chao, Tien Sheng

AU - Kao, Kuo Hsing

AU - Huang, Jyun Siang

AU - Lei, Tan Fu

PY - 2006/11/15

Y1 - 2006/11/15

N2 - In this paper, fully depleted silicon-on-insulator (SOI) devices with source/drain extension shifts and a high-κ offset spacers were investigated in detail. The calculated results show that the source/drain extension shift can decrease off-state leakage current Ioff significantly by utilizing the extra electron barrier height in the source/drain extension shift region to reduce standby power dissipation. However, the on-state driving current Ion is also sacrificed simultaneously. To overcome this drawback, a high-κ offset spacer is used to increase the on-state driving current Ion effectively by enhancing the vertical fringing electric field which elevates the channel voltage drop and reduces series resistance.

AB - In this paper, fully depleted silicon-on-insulator (SOI) devices with source/drain extension shifts and a high-κ offset spacers were investigated in detail. The calculated results show that the source/drain extension shift can decrease off-state leakage current Ioff significantly by utilizing the extra electron barrier height in the source/drain extension shift region to reduce standby power dissipation. However, the on-state driving current Ion is also sacrificed simultaneously. To overcome this drawback, a high-κ offset spacer is used to increase the on-state driving current Ion effectively by enhancing the vertical fringing electric field which elevates the channel voltage drop and reduces series resistance.

KW - Fringing electric field

KW - High-κ offset spacer dielectric

KW - S/D extension shift

KW - Silicon-on-insulator (SOI)

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M3 - 文章

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SN - 0021-4922

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JO - Japanese Journal of Applied Physics

JF - Japanese Journal of Applied Physics

IS - 11

ER -

High-κ material sidewall with source/drain-to-gate non-overlapped structure for low standby power applications

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Keywords

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