High-performance poly-silicon TFTs using a high-κ PrTiO3 gate dielectric

Tung Ming Pan*, Ching Lin Chan, Tin Wei Wu

*Corresponding author for this work

Research output: Contribution to journalJournal Article peer-review

22 Scopus citations

Abstract

In this letter, a polycrystalline-silicon thin-film transistor (poly-Si TFT) with a high- κ PrTiO3 gate dielectric is proposed for the first time. Compared to TFTs with a Pr2O3 gate dielectric, the electrical characteristics of poly-Si TFTs with a PrTiO3 gate dielectric can be significantly improved, such as lower threshold voltage, smaller subthreshold swing, higher Ion/Ioff current ratio, and larger field-effect mobility, even without any hydrogenation treatment. These improvements can be attributed to the high gate capacitance density and low grain-boundary trap state. All of these results suggest that the poly-Si TFT with a high- κ PrTiO3 gate dielectric is a good candidate for high-speed and low-power display driving circuit applications in flat-panel displays.

Original languageEnglish
Pages (from-to)39-41
Number of pages3
JournalIEEE Electron Device Letters
Volume30
Issue number1
DOIs
StatePublished - 2009

Keywords

  • Gate dielectric
  • Grain-boundary trap state
  • High-kappa; polycrystalline-silicon thin-film transistor (poly-Si TFT)
  • PrO
  • PrTiO

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