High-performance polysilicon TFTs using stacked Pr2 O3/oxynitride gate dielectric

Tung Ming Pan*, Tin Wei Wu

*Corresponding author for this work

Research output: Contribution to journalJournal Article peer-review

16 Scopus citations

Abstract

In this letter, we have developed, for the first time, a stacked Pr2O3/SiOχNy gate dielectric into low-temperature polysilicon (poly-Si) thin-film transistors (TFTs). A high-performance TFT device that has a high effective carrier mobility, a high driving current, a small subthreshold swing, and a high ION/IOFF current ratio can be achieved. This phenomenon is attributed to the smooth Pr2 O3/poly-Si interface provided by the N2O plasma treatment. The presence of the SiOχ buffer layer also enhanced the electrical reliability of the Pr2O3 poly-Si TFT. All of these results suggest that a high-k Pr2 O3 gate dielectric prepared under the buffer layer is a good candidate for high-performance TFTs.

Original languageEnglish
Pages (from-to)353-356
Number of pages4
JournalIEEE Electron Device Letters
Volume29
Issue number4
DOIs
StatePublished - 04 2008

Keywords

  • Gate dielectric
  • High-k
  • PrO
  • SiON buffer layer
  • Smooth interface
  • Thin-film transistors (TFTs)

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