High-throughput configurable motion estimation processor core for video applications

Yeong Kang Lai*, Lien Fei Chen

*Corresponding author for this work

Research output: Contribution to journalJournal Article peer-review

3 Scopus citations


In this paper, we present a configurable motion estimation processor to implement a full search block-matching algorithm. In terms of the performance requirements for different video applications, a scalable and configurable architecture can be designed to meet the specifications of system requirements such as the function, the throughput rate and external memory bandwidth. The proposed motion estimation architecture is designed to achieve the high-throughput requirements by configuring the following parameters: current block size (N), search range (p), and multiple-slice processing (m). It also efficiently reuse data of the vertically and horizontally adjacent candidate blocks to save external memory bandwidth. Implementation results show the proposed architecture is simple, modular, and regular.

Original languageEnglish
Pages (from-to)3330-3335
Number of pages6
JournalJapanese Journal of Applied Physics
Issue number4 B
StatePublished - 25 04 2006
Externally publishedYes


  • Architecture
  • Configurable motion estimator
  • VLSI


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