Hippocampal model implementation using VLSI table-look-up and model-based approaches

Richard H. Tsai; Eric Y. Chou; Bing J. Sheu; Theodore W. Berger

Hippocampal model implementation using VLSI table-look-up and model-based approaches

Richard H. Tsai^*
, Eric Y. Chou
, Bing J. Sheu
, Theodore W. Berger

^*Corresponding author for this work

University of Southern California

Research output: Contribution to conference › Conference Paper › peer-review

2 Scopus citations

Abstract

The hippocampus region of the brain system performs cognitive functions of learning and memory. VLSI design of a hippocampal model has been proposed and two mixed analog-digital chips which use analog circuits for parallel computing and digital circuits for interconnection were designed. The design with one extensive hippocampal neuron has been sent for fabrication. One of the objectives of this research effort is to incorporate adequate biological constraints into the microelectronic chips and systems.

Original language	English
Pages	1508-1512
Number of pages	5
State	Published - 1995
Externally published	Yes
Event	Proceedings of the 1995 IEEE International Conference on Neural Networks. Part 1 (of 6) - Perth, Aust Duration: 27 11 1995 → 01 12 1995

Conference

Conference	Proceedings of the 1995 IEEE International Conference on Neural Networks. Part 1 (of 6)
City	Perth, Aust
Period	27/11/95 → 01/12/95

Cite this

@conference{b0854f756ef7426c91be5479cc3e4d31,

title = "Hippocampal model implementation using VLSI table-look-up and model-based approaches",

abstract = "The hippocampus region of the brain system performs cognitive functions of learning and memory. VLSI design of a hippocampal model has been proposed and two mixed analog-digital chips which use analog circuits for parallel computing and digital circuits for interconnection were designed. The design with one extensive hippocampal neuron has been sent for fabrication. One of the objectives of this research effort is to incorporate adequate biological constraints into the microelectronic chips and systems.",

author = "Tsai, \{Richard H.\} and Chou, \{Eric Y.\} and Sheu, \{Bing J.\} and Berger, \{Theodore W.\}",

year = "1995",

language = "英语",

pages = "1508--1512",

note = "Proceedings of the 1995 IEEE International Conference on Neural Networks. Part 1 (of 6) ; Conference date: 27-11-1995 Through 01-12-1995",

}

TY - CONF

T1 - Hippocampal model implementation using VLSI table-look-up and model-based approaches

AU - Tsai, Richard H.

AU - Chou, Eric Y.

AU - Sheu, Bing J.

AU - Berger, Theodore W.

PY - 1995

Y1 - 1995

N2 - The hippocampus region of the brain system performs cognitive functions of learning and memory. VLSI design of a hippocampal model has been proposed and two mixed analog-digital chips which use analog circuits for parallel computing and digital circuits for interconnection were designed. The design with one extensive hippocampal neuron has been sent for fabrication. One of the objectives of this research effort is to incorporate adequate biological constraints into the microelectronic chips and systems.

AB - The hippocampus region of the brain system performs cognitive functions of learning and memory. VLSI design of a hippocampal model has been proposed and two mixed analog-digital chips which use analog circuits for parallel computing and digital circuits for interconnection were designed. The design with one extensive hippocampal neuron has been sent for fabrication. One of the objectives of this research effort is to incorporate adequate biological constraints into the microelectronic chips and systems.

UR - https://www.scopus.com/pages/publications/0029535720

M3 - 论文

AN - SCOPUS:0029535720

SP - 1508

EP - 1512

T2 - Proceedings of the 1995 IEEE International Conference on Neural Networks. Part 1 (of 6)

Y2 - 27 November 1995 through 1 December 1995

ER -

Hippocampal model implementation using VLSI table-look-up and model-based approaches

Abstract

Conference

Other files and links

Fingerprint

Cite this