Impacts of Trap-State Generation on Tunnel Thin-Film Transistor

William Cheng Yu Ma*, Hui Shun Hsu, Chih Cheng Fang, Che Yu Jao, Tzu Han Liao

*Corresponding author for this work

Research output: Contribution to journalJournal Article peer-review

6 Scopus citations

Abstract

In this paper, the positive bias temperature instability (PBTI) of the tunnel thin-film transistor (TFT) is well studied and compared with the conventional-TFT. The tunnel-TFT exhibits superior PBTI immunity at high temperature and shows distinct temperature dependence of PBTI from the conventional-TFT. This is due to different influences of trap-state generation on electrical behavior of the two devices. For the poly-Si tunnel-TFT featuring trap-assisted tunneling (TAT), the impact of trap-state generation on tunneling probability is found to be temperature dependent. At lower temperature, the TAT current of a tunnel-TFT is reduced due to the lower interband transition probability, resulting in pronounced temperature dependence on the additional generated trap states after electrical stress. Therefore, the worst PBTI behavior of a tunnel-TFT occurs when the device is stressed at low temperature. Our results may be helpful to further reliability investigation of tunneling devices.

Original languageEnglish
Pages (from-to)1363-1369
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume65
Issue number4
DOIs
StatePublished - 04 2018
Externally publishedYes

Bibliographical note

Publisher Copyright:
© 2012 IEEE.

Keywords

  • Poly-Si channel
  • positive bias temperature instability (PBTI)
  • thin-film transistor (TFT)
  • tunnel transistor

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