@inproceedings{61e38e9526724cb79201d98e4ea6559b,
title = "Influence of postdeposition annealing on physical and electrical properties of high-k Yb2TiO5 gate dielectrics",
abstract = "The structure and electrical properties of a high-k Yb2TiO 5 gate dielectric deposited on Si(100) substrates through reactive cosputtering were investigated. X-ray diffraction, X-ray photoelectron spectroscopy and atomic force microscopy were used to study the morphological and chemical features of these films as functions of the growth conditions. The Yb2TiO5 dielectrics annealed at 800°C exhibited a thinner capacitance equivalent thickness, a lower gate leakage current, a smaller density of interface state, and a relatively lower hysteresis voltage compared to those at other annealing temperatures. These results are attributed to the formation of a rather well-crystallized Yb2TiO5 structure and composition.",
author = "Pan, {Tung Ming} and Yen, {Li Chen} and Chiang, {Chien Hung} and Chao, {Tien Sheng}",
year = "2010",
doi = "10.1149/1.3375608",
language = "英语",
isbn = "9781566777919",
series = "ECS Transactions",
publisher = "Electrochemical Society Inc.",
number = "1",
pages = "247--252",
booktitle = "Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 6",
edition = "1",
}