Investigation of RF performance of InGaP/GaAs HBT power stage with flip-chip bumping technology

In this paper, we present 3.5 GHz HBT power cell device by using WIN’s 5^th generation HBT process and flip-chip bump technology. Small-signal and large-signal characterizations are investigated and analyzed through the measured results within different thickness of evaluation boards (EVB). Through a proper EVB design, the flip-chip bumped power cell exhibits a remarkable improvement on MAG/MSG, and it presents low surface temperature behavior. The maximum output power of 32 dBm can be achieved at supply voltages of 3.4 V and 4.3 V, and the maximum PAE performances are close to 68 % under 1-tone large-signal test. In order to further realize the linearity performance relative to the grounding inductance caused from the via hole design of EVB, ACPR measurement was employed based on LTE modulation signal and loadpull system. With thermal IR measurement and calculation of thermal resistance, the performance optimization between small-signal and large-signal characterizations can be approached for ultra-high-band (UHB) HBT PA design.