IP Design on Real-Time Edge Detection using FPGA

文樺

Research output: Types of ThesisMaster's thesis

Translated title of the contribution以FPGA實現之即時影像邊緣偵測IP設計
Original languageAmerican English
Supervisors/Advisors
  • Hsiao, Pei-Yung, Supervisor
StatePublished - 2004
Externally publishedYes

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