LDPC coded modulation for TLC flash memory

Huang Chang Lee; Jieng Heng Shy; Yen Ming Chen; Yeong Luh Ueng

doi:10.1109/ITW.2017.8278036

LDPC coded modulation for TLC flash memory

Huang Chang Lee, Jieng Heng Shy, Yen Ming Chen, Yeong Luh Ueng

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

9 Scopus citations

Abstract

In this paper, a coded modulation scheme using extremely sparse low-density parity-check (LDPC) codes is proposed for the stored signal of triple-level-cell (TLC) NAND flash, where both the encoding and the decoding complexity can be significantly reduced with the advantage of the extremely sparse code graph. In order to enhance the performance of decoder, iterative detection decoding (IDD) is introduced to extract the extrinsic information from the symbol detector, and the cooperative non-Gray mapping is also designed. In addition, for error floor lowering, an interleaver is inserted to ensure the cascaded degree-2 variable nodes are separated to individual symbols. The simulation results show that the proposed coded modulation scheme can provide a practical error floor performance with a low decoding complexity.

Original language	English
Title of host publication	2017 IEEE Information Theory Workshop, ITW 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	204-208
Number of pages	5
ISBN (Electronic)	9781509030972
DOIs	https://doi.org/10.1109/ITW.2017.8278036
State	Published - 02 07 2017
Event	2017 IEEE Information Theory Workshop, ITW 2017 - Kaohsiung, Taiwan Duration: 06 11 2017 → 10 11 2017

Publication series

Name	IEEE International Symposium on Information Theory - Proceedings
Volume	2018-January
ISSN (Print)	2157-8095

Conference

Conference	2017 IEEE Information Theory Workshop, ITW 2017
Country/Territory	Taiwan
City	Kaohsiung
Period	06/11/17 → 10/11/17

Bibliographical note

Publisher Copyright:
© 2017 IEEE.

Keywords

Coded modulation
LDPC codes
TLC flash memory

Access to Document

10.1109/ITW.2017.8278036

Cite this

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title = "LDPC coded modulation for TLC flash memory",

abstract = "In this paper, a coded modulation scheme using extremely sparse low-density parity-check (LDPC) codes is proposed for the stored signal of triple-level-cell (TLC) NAND flash, where both the encoding and the decoding complexity can be significantly reduced with the advantage of the extremely sparse code graph. In order to enhance the performance of decoder, iterative detection decoding (IDD) is introduced to extract the extrinsic information from the symbol detector, and the cooperative non-Gray mapping is also designed. In addition, for error floor lowering, an interleaver is inserted to ensure the cascaded degree-2 variable nodes are separated to individual symbols. The simulation results show that the proposed coded modulation scheme can provide a practical error floor performance with a low decoding complexity.",

keywords = "Coded modulation, LDPC codes, TLC flash memory",

author = "Lee, {Huang Chang} and Shy, {Jieng Heng} and Chen, {Yen Ming} and Ueng, {Yeong Luh}",

note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 2017 IEEE Information Theory Workshop, ITW 2017 ; Conference date: 06-11-2017 Through 10-11-2017",

year = "2017",

month = jul,

day = "2",

doi = "10.1109/ITW.2017.8278036",

language = "英语",

series = "IEEE International Symposium on Information Theory - Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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booktitle = "2017 IEEE Information Theory Workshop, ITW 2017",

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Lee, HC, Shy, JH, Chen, YM & Ueng, YL 2017, LDPC coded modulation for TLC flash memory. in 2017 IEEE Information Theory Workshop, ITW 2017. IEEE International Symposium on Information Theory - Proceedings, vol. 2018-January, Institute of Electrical and Electronics Engineers Inc., pp. 204-208, 2017 IEEE Information Theory Workshop, ITW 2017, Kaohsiung, Taiwan, 06/11/17. https://doi.org/10.1109/ITW.2017.8278036

LDPC coded modulation for TLC flash memory. / Lee, Huang Chang; Shy, Jieng Heng; Chen, Yen Ming et al.
2017 IEEE Information Theory Workshop, ITW 2017. Institute of Electrical and Electronics Engineers Inc., 2017. p. 204-208 (IEEE International Symposium on Information Theory - Proceedings; Vol. 2018-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - In this paper, a coded modulation scheme using extremely sparse low-density parity-check (LDPC) codes is proposed for the stored signal of triple-level-cell (TLC) NAND flash, where both the encoding and the decoding complexity can be significantly reduced with the advantage of the extremely sparse code graph. In order to enhance the performance of decoder, iterative detection decoding (IDD) is introduced to extract the extrinsic information from the symbol detector, and the cooperative non-Gray mapping is also designed. In addition, for error floor lowering, an interleaver is inserted to ensure the cascaded degree-2 variable nodes are separated to individual symbols. The simulation results show that the proposed coded modulation scheme can provide a practical error floor performance with a low decoding complexity.

AB - In this paper, a coded modulation scheme using extremely sparse low-density parity-check (LDPC) codes is proposed for the stored signal of triple-level-cell (TLC) NAND flash, where both the encoding and the decoding complexity can be significantly reduced with the advantage of the extremely sparse code graph. In order to enhance the performance of decoder, iterative detection decoding (IDD) is introduced to extract the extrinsic information from the symbol detector, and the cooperative non-Gray mapping is also designed. In addition, for error floor lowering, an interleaver is inserted to ensure the cascaded degree-2 variable nodes are separated to individual symbols. The simulation results show that the proposed coded modulation scheme can provide a practical error floor performance with a low decoding complexity.

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LDPC coded modulation for TLC flash memory

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