Lifetime modeling for stress-induced voiding in integrated circuit interconnections

Cher Ming Tan*, Yuejin Hou

*Corresponding author for this work

Research output: Contribution to journalJournal Article peer-review

10 Scopus citations


By considering the stress-induced voiding (SIV) as a result of strain energy relief in the presence of flaws, an analytical lifetime model for SIV is derived from the energy perspective. The SIV lifetime is strongly dependent on the passivation integrity of the cap layer, effective bulk modulus of the interconnect system, diffusivities of the interconnect atoms in the dominant diffusion paths, stress free temperature, and temperature of the interconnection. The calculated SIV lifetime and the critical temperature are found to be consistent with the experimental values.

Original languageEnglish
Article number061904
JournalApplied Physics Letters
Issue number6
StatePublished - 2007
Externally publishedYes


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