Low insertion loss Ka-band SPST switch using S-GCPW designs

Kuan Liang Cho; Hsien Chin Chiu; Yen Chang Tu; Chia Sung Wu

doi:10.1109/HSIC.2012.6213002

Low insertion loss Ka-band SPST switch using S-GCPW designs

Kuan Liang Cho^*, Hsien Chin Chiu, Yen Chang Tu, Chia Sung Wu

^*Corresponding author for this work

Department of Electronic Engineering

Chang Gung University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper presented 28 GHz single-pole-single-throw switch using a 0.18 m CMOS process. The CMOS transistors are designed to have a high substrate resistance to minimize the insertion loss and improve power handling capability. The SPST switch has insertion loss of 7.2 dB and isolation is greater than-29 dB at 24 GHz.

Original language	English
Title of host publication	2012 4th International High Speed Intelligent Communication Forum, HSIC 2012, Proceeding
Pages	26-28
Number of pages	3
DOIs	https://doi.org/10.1109/HSIC.2012.6213002
State	Published - 2012
Event	2012 4th International High Speed Intelligent Communication Forum, HSIC 2012 - Nanjing, China Duration: 10 05 2012 → 11 05 2012

Publication series

Name	2012 4th International High Speed Intelligent Communication Forum, HSIC 2012, Proceeding

Conference

Conference	2012 4th International High Speed Intelligent Communication Forum, HSIC 2012
Country/Territory	China
City	Nanjing
Period	10/05/12 → 11/05/12

Keywords

CMOS switch
SPST
microwave switch

Access to Document

10.1109/HSIC.2012.6213002

Cite this

Cho, K. L., Chiu, H. C., Tu, Y. C., & Wu, C. S. (2012). Low insertion loss Ka-band SPST switch using S-GCPW designs. In 2012 4th International High Speed Intelligent Communication Forum, HSIC 2012, Proceeding (pp. 26-28). Article 6213002 (2012 4th International High Speed Intelligent Communication Forum, HSIC 2012, Proceeding). https://doi.org/10.1109/HSIC.2012.6213002

@inproceedings{c1c990b561144530949659a0b765f006,

title = "Low insertion loss Ka-band SPST switch using S-GCPW designs",

abstract = "This paper presented 28 GHz single-pole-single-throw switch using a 0.18 m CMOS process. The CMOS transistors are designed to have a high substrate resistance to minimize the insertion loss and improve power handling capability. The SPST switch has insertion loss of 7.2 dB and isolation is greater than-29 dB at 24 GHz.",

keywords = "CMOS switch, SPST, microwave switch",

author = "Cho, {Kuan Liang} and Chiu, {Hsien Chin} and Tu, {Yen Chang} and Wu, {Chia Sung}",

year = "2012",

doi = "10.1109/HSIC.2012.6213002",

language = "英语",

isbn = "9781467306751",

series = "2012 4th International High Speed Intelligent Communication Forum, HSIC 2012, Proceeding",

pages = "26--28",

booktitle = "2012 4th International High Speed Intelligent Communication Forum, HSIC 2012, Proceeding",

note = "2012 4th International High Speed Intelligent Communication Forum, HSIC 2012 ; Conference date: 10-05-2012 Through 11-05-2012",

}

Cho, KL, Chiu, HC, Tu, YC & Wu, CS 2012, Low insertion loss Ka-band SPST switch using S-GCPW designs. in 2012 4th International High Speed Intelligent Communication Forum, HSIC 2012, Proceeding., 6213002, 2012 4th International High Speed Intelligent Communication Forum, HSIC 2012, Proceeding, pp. 26-28, 2012 4th International High Speed Intelligent Communication Forum, HSIC 2012, Nanjing, China, 10/05/12. https://doi.org/10.1109/HSIC.2012.6213002

Low insertion loss Ka-band SPST switch using S-GCPW designs. / Cho, Kuan Liang; Chiu, Hsien Chin; Tu, Yen Chang et al.
2012 4th International High Speed Intelligent Communication Forum, HSIC 2012, Proceeding. 2012. p. 26-28 6213002 (2012 4th International High Speed Intelligent Communication Forum, HSIC 2012, Proceeding).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Low insertion loss Ka-band SPST switch using S-GCPW designs

AU - Cho, Kuan Liang

AU - Chiu, Hsien Chin

AU - Tu, Yen Chang

AU - Wu, Chia Sung

PY - 2012

Y1 - 2012

N2 - This paper presented 28 GHz single-pole-single-throw switch using a 0.18 m CMOS process. The CMOS transistors are designed to have a high substrate resistance to minimize the insertion loss and improve power handling capability. The SPST switch has insertion loss of 7.2 dB and isolation is greater than-29 dB at 24 GHz.

AB - This paper presented 28 GHz single-pole-single-throw switch using a 0.18 m CMOS process. The CMOS transistors are designed to have a high substrate resistance to minimize the insertion loss and improve power handling capability. The SPST switch has insertion loss of 7.2 dB and isolation is greater than-29 dB at 24 GHz.

KW - CMOS switch

KW - SPST

KW - microwave switch

UR - http://www.scopus.com/inward/record.url?scp=84864049976&partnerID=8YFLogxK

U2 - 10.1109/HSIC.2012.6213002

DO - 10.1109/HSIC.2012.6213002

M3 - 会议稿件

AN - SCOPUS:84864049976

SN - 9781467306751

T3 - 2012 4th International High Speed Intelligent Communication Forum, HSIC 2012, Proceeding

SP - 26

EP - 28

BT - 2012 4th International High Speed Intelligent Communication Forum, HSIC 2012, Proceeding

T2 - 2012 4th International High Speed Intelligent Communication Forum, HSIC 2012

Y2 - 10 May 2012 through 11 May 2012

ER -

Low insertion loss Ka-band SPST switch using S-GCPW designs

Abstract

Publication series

Conference

Keywords

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