| Translated title of the contribution | 應用於固定寬度布斯乘法器之基於列之低延遲及節能二元補償器設計 |
|---|---|
| Original language | American English |
| Supervisors/Advisors |
|
| State | Published - 2024 |
| Externally published | Yes |
Cite this
- APA
- Author
- BIBTEX
- Harvard
- Standard
- RIS
- Vancouver
Low-latency and Power-efficient Row-based Binary-Weighted Compensator for Fixed-Width Booth Multiplier
- 胡閎淇
Research output: Types of Thesis › Master's thesis