Low noise high and low speed output buffer design for USB applications

A low noise high and low speed output buffer circuit is proposed for Universal Serial Bus (USB) interface applications. Operation principles of this presented buffer are developed with emphasis on noise reduction by slew rate control and delayed turn-on technique. The mechanism for slew rate control is process variation self compensating. So, both precise rise and fall times of the output signal have been obtained for low speed operation. Moreover, the pull-up and pull-down output drivers are divided into several sub-drivers in parallel with the delayed turn-on characteristics. Therefore, the change of rate of di/dt decreases. And the simultaneous switching noise, based on simulations of parasitic inductance of 30 nano henry in both power and ground, are reduced from maximum overshoot 3.61V to 3.45V with improvement 4.85% and maximum undershoot from -0.626V to -0.149V with improvement 14.5%, respectively. This proposed output buffer design is low cost due to its easy realization in a digital CMOS process. The disclosed output buffer has been integrated in a complete USB transceiver circuit. Based on measured silicon data, satisfactory functions of the whole USB application IC have been obtained.