Low power design for RF circuits

Wu Shiung Feng*, Chin I. Yeh, Cheng Ming Tsao, Ho Hsin Li, Prasenjit Chatterjee, Chia Hsun Chen

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

The paper presents low-power design strategies for RF circuits, such as PA, LNA, mixer, and VCO. The design strategies focus on not only the low energy consumption with reused bias current but also the small chip area for low spurious environment contamination. For the low-power design, some published literatures have been adopted the operation voltage from 3V down to only 0.2V, to save the dissipated dc power from tens mW to several hundreds of μW. Additionally, many design strategies and green figures of merit (GFOM) are also presented in this work, for the future green RF circuit design.

Original languageEnglish
Title of host publicationProceedings of 2011 Cross Strait Quad-Regional Radio Science and Wireless Technology Conference, CSQRWC 2011
Pages657-660
Number of pages4
DOIs
StatePublished - 2011
Event2011 Cross Strait Quad-Regional Radio Science and Wireless Technology Conference, CSQRWC 2011 - Harbin, China
Duration: 27 07 201130 07 2011

Publication series

NameProceedings of 2011 Cross Strait Quad-Regional Radio Science and Wireless Technology Conference, CSQRWC 2011
Volume1

Conference

Conference2011 Cross Strait Quad-Regional Radio Science and Wireless Technology Conference, CSQRWC 2011
Country/TerritoryChina
CityHarbin
Period27/07/1130/07/11

Keywords

  • RF circuits
  • low power design
  • voltage-controlled oscillator

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