Abstract
Processes for fabricating a Ni nanocrystal (NC)-assisted low-temperature polycrystalline silicon thin film transistor (LTPS-TFT) nonvolatile memory device of noble stack below 600 °C were successfully developed. The NCs were fabricated in H-plasma atmosphere by heating a nanosized Ni film to realize an appropriate nanoparticle distribution. Results show that NCs with a number density of ∼5 × 1011 cm-2 and a particle diameter of 4 to 12 nm can successfully be fabricated as charge-trapping centers for enhancing the device performance. The results also indicate that the data retentions at the initial time and after 104 s for a SiO 2/Ni-NCs/Si3N4/SiO2 gate under the present stack of devices are about 2.2 and ∼1.1 V, respectively.
| Original language | English |
|---|---|
| Pages (from-to) | 06GG151-06GG154 |
| Journal | Japanese Journal of Applied Physics |
| Volume | 49 |
| Issue number | 6 PART 2 |
| DOIs | |
| State | Published - 06 2010 |
| Externally published | Yes |