TY - JOUR
T1 - Machine Learning-Based Detection Method for Wafer Test Induced Defects
AU - Cheng, Ken Chau Cheung
AU - Chen, Leon Li Yang
AU - Li, Ji Wei
AU - Li, Katherine Shu Min
AU - Tsai, Nova Cheng Yen
AU - Wang, Sying Jyan
AU - Huang, Andrew Yi Ann
AU - Chou, Leon
AU - Lee, Chen Shiun
AU - Chen, Jwu E.
AU - Liang, Hsing Chung
AU - Hsu, Chun Lung
N1 - Publisher Copyright:
© 1988-2012 IEEE.
PY - 2021/5
Y1 - 2021/5
N2 - Wafer test is carried out after integrated circuits (IC) fabrication to screen out bad dies. In addition, the results can be used to identify problems in the fabrication process and improve manufacturing yield. However, the wafer test itself may induce defects to otherwise good dies. Test-induced defects not only hurt overall manufacturing yield but also create problems for yield learning, so the source problems in testing should be identified quickly. In the wafer acceptance test process, dies are probed in a predetermined order, so test-induced defects, also known as site-dependent faults, exhibit specific patterns that can be effectively captured in test paths. In this paper, we analyze characteristics of test-induced defect patterns and define features that can be used by machine learning algorithms for the automatic detection of test-induced defects. Therefore, defective dies caused by the wafer test can be retested for yield improvement. Test data from six real products are used to validate the proposed method. Several machine learning algorithms have been applied, and experimental results show that our method is effective to distinguish between test-induced and fabrication-induced defects. On average, the prediction accuracy is higher than 97%.
AB - Wafer test is carried out after integrated circuits (IC) fabrication to screen out bad dies. In addition, the results can be used to identify problems in the fabrication process and improve manufacturing yield. However, the wafer test itself may induce defects to otherwise good dies. Test-induced defects not only hurt overall manufacturing yield but also create problems for yield learning, so the source problems in testing should be identified quickly. In the wafer acceptance test process, dies are probed in a predetermined order, so test-induced defects, also known as site-dependent faults, exhibit specific patterns that can be effectively captured in test paths. In this paper, we analyze characteristics of test-induced defect patterns and define features that can be used by machine learning algorithms for the automatic detection of test-induced defects. Therefore, defective dies caused by the wafer test can be retested for yield improvement. Test data from six real products are used to validate the proposed method. Several machine learning algorithms have been applied, and experimental results show that our method is effective to distinguish between test-induced and fabrication-induced defects. On average, the prediction accuracy is higher than 97%.
KW - Wafer test
KW - machine learning
KW - site-dependent fault
KW - test yield
KW - test-induced defects
KW - wafer map
UR - http://www.scopus.com/inward/record.url?scp=85102692249&partnerID=8YFLogxK
U2 - 10.1109/TSM.2021.3065405
DO - 10.1109/TSM.2021.3065405
M3 - 文章
AN - SCOPUS:85102692249
SN - 0894-6507
VL - 34
SP - 161
EP - 167
JO - IEEE Transactions on Semiconductor Manufacturing
JF - IEEE Transactions on Semiconductor Manufacturing
IS - 2
M1 - 9375473
ER -