Matrix-matrix multiplications and fault tolerance on hypercube multiprocessors

Y. R. Leu, I. Y. Chen, S. Y. Kuo

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Several new algorithms for matrix-matrix multiplications on hypercube multiprocessors are presented and evaluated based on the number of multiplications, additions, and transfers. The matrices to be multiplied are uniformly distributed to all processors of a hypercube system. Each processor owns some submatrices which are derived by dividing the source matrices. Each submatrix multiplication can now be performed independently within a processor. All the partial results are then summed up and transferred to a single processor. An orthogonal tree is used for efficient communication. The time complexity is O(log2p) if p × p processors are used. In addition, the UDD (Uniform Data Distribution) approach is employed when some processors do not work properly and the faulty effects have been detected. Two classes of fault patterns are considered and evaluated.

Original languageEnglish
Title of host publicationProceedings of International Conference on Application Specific Array Processors, ASAP 1993
EditorsBenjamin Wah, Luigi Dadda
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages176-179
Number of pages4
ISBN (Electronic)0818634928
DOIs
StatePublished - 1993
Externally publishedYes
Event1993 International Conference on Application Specific Array Processors, ASAP 1993 - Venice, Italy
Duration: 25 10 199327 10 1993

Publication series

NameProceedings of the International Conference on Application-Specific Systems, Architectures and Processors
ISSN (Print)1063-6862

Conference

Conference1993 International Conference on Application Specific Array Processors, ASAP 1993
Country/TerritoryItaly
CityVenice
Period25/10/9327/10/93

Bibliographical note

Publisher Copyright:
© 1993 IEEE.

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