Metal routing induced burn out in GGNMOS ESD protection for low-power DRAM application

Minchen Chang, Tseng Fu Lu, Wei Chih Wang, Fan Wen Liu, Jao Hsiu Rao, Wei Ming Liao, Chia Ming Yang, Jeng Ping Lin

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

With high 110 numbers in low-power DRAM technology, ESD design is limited by on-chip metal routing. An unusual burn out pattern in GGNMOS is found. Failure is driven by metal induced joule heating. Metal routing restriction in GGNMOS is discussed and design guidance is set for low-power DRAM Design.

Original languageEnglish
Title of host publicationElectrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2014
PublisherESD Association
EditionNovember
ISBN (Electronic)1585372587, 9781585372577
StatePublished - 26 11 2014
Event36th International Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2014 - Tucson, United States
Duration: 07 09 201412 09 2014

Publication series

NameElectrical Overstress/Electrostatic Discharge Symposium Proceedings
NumberNovember
Volume2014-November
ISSN (Print)0739-5159

Conference

Conference36th International Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2014
Country/TerritoryUnited States
CityTucson
Period07/09/1412/09/14

Fingerprint

Dive into the research topics of 'Metal routing induced burn out in GGNMOS ESD protection for low-power DRAM application'. Together they form a unique fingerprint.

Cite this