Multi-core FPGA implementation of ECC with homogeneous Co-Z coordinate representation

Bo Yuan Peng*, Yuan Che Hsu, Yu Jia Chen, Di Chia Chueh, Chen Mou Cheng, Bo Yin Yang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations


Elliptic Curve Cryptography is gaining popularity, and optimization opportunities exist on several different levels: algorithm, architecture, and/or implementation. To support a wide variety of curves and at the same time resist timing/power-based side-channel attacks, our scalar multiplication is implemented using the Co-Z ladder due to Hutter, Joye, and Sierra. We analyze the parallelism of the Co-Z ladder and show that a 12-core (though inefficient) system can complete a ladder step with the fastest speed. We also combine optimizations at every level in an efficient multi-core FPGA implementation. The size of the prime modulus can also be changed easily, for which we have implemented and tested up to 528-bits used in the NIST P-521 curve. Based on this building block, we have developed a multi-core architecture that supports multiple parallel modular additions, multiplications, and inverses.

Original languageEnglish
Title of host publicationCryptology and Network Security - 15th International Conference, CANS 2016, Proceedings
EditorsGiuseppe Persiano, Sara Foresti
PublisherSpringer Verlag
Number of pages11
ISBN (Print)9783319489643
StatePublished - 2016
Externally publishedYes
Event15th International Conference on Cryptology and Network Security, CANS 2016 - Milan, Italy
Duration: 14 11 201616 11 2016

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume10052 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349


Conference15th International Conference on Cryptology and Network Security, CANS 2016

Bibliographical note

Publisher Copyright:
© Springer International Publishing AG 2016.


  • Co-Z
  • ECC
  • FPGA
  • Montgomery reduction
  • Multi-core


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