Multipoint Model Order Reductions of High-Speed VLSI Interconnects Using the Padé via Intelligent Rational Lanczos Algorithm (PVIRL)

李恆哲

Research output: Types of Thesis › Master's thesis

Translated title of the contribution以智慧型有理Lanczos (PVIRL)法作高速超大型積體電路之多點Padé模型近似
Original languageAmerican English
Supervisors/Advisors
  • Chu, Chia-Chi, Supervisor
StatePublished - 1999
Externally publishedYes

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