Negative bias temperature instability for P-channel of LTPS thin film transistors with fluorine implantation

Chyuan Haur Kao*, W. H. Sung

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper studies the impact of LTPS (low temperature polycrystalline silicon) TFTs with fluorine implantation under NBTT (Negative bias temperature instability) stress. The fluorinated TFTs' devices can obtain better characteristics with samller threshold voltage shift, lower trap states and lower subthreshold swing variation. Therefore, the fluorine implantation does not only improve initial electrical characteristics, but also suppresses the NBTI-induced degradation.

Original languageEnglish
Title of host publicationAmorphous and Polycrystalline Thin-Film Silicon Science and Technology - 2008
PublisherMaterials Research Society
Pages367-372
Number of pages6
ISBN (Print)9781605110363
DOIs
StatePublished - 2008
Event2008 MRS spring meeting - San Francisco, California, USA, San Francisco, CA, United States
Duration: 24 03 200828 03 2008

Publication series

NameMaterials Research Society Symposium Proceedings
Volume1066
ISSN (Print)0272-9172

Conference

Conference2008 MRS spring meeting
Country/TerritoryUnited States
CitySan Francisco, CA
Period24/03/0828/03/08

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