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New bit-parallel systolic multipliers for a class of GF(2m)

  • C. Y. Lee*
  • , E. H. Lu
  • , J. Y. Lee
  • *Corresponding author for this work
  • Chang Gung University

Research output: Contribution to journalConference articlepeer-review

2 Scopus citations

Abstract

The operations of the cyclic shifting and the inner proadct are defined based on the properties of irreducible all one polynomials. With the two operations, an effective algorithm for computing multiplications over a class of GF(2m) was developed in this paper. The low-complexity bit-parallel systolic multiplier is presented. The multiplier is the latency of m/2+2 clock cycles. The multiplier has very low latency, which makes them very fast. Moreover the architectures of the multiplier can also be applied to compute multiplications over the class of GF(2m) in which the elements are represented with the root of an irreducible equally spaced polynomial of degree m.

Original languageEnglish
Pages (from-to)IV578-IV581
JournalMaterials Research Society Symposium - Proceedings
Volume626
StatePublished - 2001
EventThermoelectric Materials 2000-The Next Generation Materials for Small-Scale Refrigeration and Power Generation Applications - San Francisco, CA, United States
Duration: 24 04 200027 04 2000

Keywords

  • AOP
  • Bit-parallel systolic multiplier
  • ESP
  • Finite fields

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