New decoder for double-error-correcting binary BCH codes

E. H. Lu; T. Chang

doi:10.1049/ip-com:19960453

New decoder for double-error-correcting binary BCH codes

E. H. Lu^*, T. Chang

^*Corresponding author for this work

Department of Electrical Engineering

National Defense University Taiwan

Research output: Contribution to journal › Journal Article › peer-review

15 Scopus citations

Abstract

A step-by-step decoding algorithm is presented for double-error-correcting binary BCH codes of length n = 2^m - 1. The decoding algorithm can directly determine whether any received bit is correct or not without knowing the number of errors which have occurred in the received vector and also without determining the corresponding error location polynomial. The merits of the hardware decoder based on the algorithm are that it is very simple and fast. In addition, it is suitable for decoding long block codes.

Original language	English
Pages (from-to)	129-132
Number of pages	4
Journal	IEE Proceedings: Communications
Volume	143
Issue number	3
DOIs	https://doi.org/10.1049/ip-com:19960453
State	Published - 1996

Keywords

BCH code
Hardware decoder
Step-by-step decoding algorithm

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10.1049/ip-com:19960453

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abstract = "A step-by-step decoding algorithm is presented for double-error-correcting binary BCH codes of length n = 2m - 1. The decoding algorithm can directly determine whether any received bit is correct or not without knowing the number of errors which have occurred in the received vector and also without determining the corresponding error location polynomial. The merits of the hardware decoder based on the algorithm are that it is very simple and fast. In addition, it is suitable for decoding long block codes.",

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author = "Lu, {E. H.} and T. Chang",

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AB - A step-by-step decoding algorithm is presented for double-error-correcting binary BCH codes of length n = 2m - 1. The decoding algorithm can directly determine whether any received bit is correct or not without knowing the number of errors which have occurred in the received vector and also without determining the corresponding error location polynomial. The merits of the hardware decoder based on the algorithm are that it is very simple and fast. In addition, it is suitable for decoding long block codes.

KW - BCH code

KW - Hardware decoder

KW - Step-by-step decoding algorithm

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ER -

New decoder for double-error-correcting binary BCH codes

Abstract

Keywords

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